Structural analysis and generation of synthetic digital circuits with memory

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 9, Issue 1, 2001, Pages 223-226

  Wilton, Steven J E ^a   Rose, Jonathan ^b   Vranesic, Zvonko ^b  

^a UNIVERSITY OF BRITISH COLUMBIA   (Canada)

^b UNIVERSITY OF TORONTO   (Canada)

Author keywords

Field programmable gate arrays (FPGAs); Stochastic circuit generation; Structural circuit analysis

Indexed keywords

COMBINATORIAL CIRCUITS; COMPUTER AIDED LOGIC DESIGN; COMPUTER ARCHITECTURE; DATA STORAGE EQUIPMENT; DIGITAL CIRCUITS; FIELD PROGRAMMABLE GATE ARRAYS; RANDOM PROCESSES; SEQUENTIAL CIRCUITS;

BENCHMARK CIRCUITS; CIRCUIT GENERATORS; STOCHASTIC CIRCUIT GENERATION; STRUCTURAL CIRCUIT ANALYSIS;

COMPUTER AIDED NETWORK ANALYSIS;

EID: 0035242894     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/92.920838     Document Type: Article

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