A filter processor for interpolation and decimation

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 1992, Pages

  Karema, T ^a   Husu, T ^b   Saramaki T ^b   Tenhunen, H ^c  

^a AMS AG   (Austria)

^b TAMPERE UNIVERSITY OF TECHNOLOGY   (Finland)

^c ROYAL INSTITUTE OF TECHNOLOGY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

A/D CONVERTER; HALF-BAND FILTER; MULTI-STAGE; MULTISTAGE DECIMATOR; PROGRAM CODE; SILICON AREA;

INTEGRATED CIRCUITS;

INTERPOLATION;

EID: 84870048872     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.1992.591332     Document Type: Conference Paper

References (10)

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2. "Cascadable-Adaptive Finite-Impulse-Response (CAFIR) Digital-Filter Chip", Technical data sheet DSP56200, Motorola Semiconductor Corporation.
3. Y. Matsuya, K. Uchimura, A. Iwata, T. Kobayashi, M. Ishikawa and T. Yoshitome, "A 16-bit Oversampling A-to-D Conversion Technology Using Triple-Integration Noise Shaping", IEEE Journal of Solid-State Circuits, vol. SC-22, pp. 921-929, Dec. 1987.
4. D. Welland, B. Del Signore and E. Swanson, "A Stereo 16-Bit Delta-Sigma A/D Converter for Digital Audio", The 85th Convention of AES, Nov. 1988, Reprint #2724.
5. B. Kup, E. Dijkmans, H. Naus and J. Sneep, "A Bit-stream Digital-to-Analog Converter with 18b Resolution", in Proc. IEEE Int. Solid-State Circuits Conference, vol. 34, pp. 70-71, Feb. 1991.
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7. T. Saramäki and H. Tenhunen, "Efficient VLSI-Realizable Decimators for Sigma-Delta Analog-to-Digital Converters", in Proc. IEEE Int. Symp. on Circuits and Systems, June 1989, pp. 1525-1528.
8. T. Saramäki, T. Karema, T. Ritoniemi and H. Tenhunen, "Multiplier-Free Decimator Algorithms for Superresolution Oversampled Converters", in Proc. IEEE Int. Symp. on Circuits and Systems, May 1990, pp. 3275-3278.
9. T. Saramäki, T. Karema, T. Ritoniemi and H. Tenhunen, "VLSI-Realizable Multiplier-Free Interpolators for High-Order Sigma-Delta D/A Converters, in Proc. Mediterranean Electrotechnical Conference, May 1991, pp. 295-298.
10. T. Saramäki "Design of FIR Filters as a Tapped Cascaded Interconnection of Identical Subfilters", IEEE Trans. on Circuits and Systems, vol. CAS-34, pp. 1011-1029, Sep. 1987.