메뉴 건너뛰기




Volumn , Issue , 2001, Pages 651-654

Challenges in Power-Ground integrity

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC POTENTIAL; ELECTRIC POWER DISTRIBUTION; POWER INTEGRATED CIRCUITS; RESONANCE; SPURIOUS SIGNAL NOISE;

EID: 0035212919     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (88)

References (19)
  • 2
    • 0025452013 scopus 로고
    • System, process, and design implications of a reduced supply voltage microprocessor
    • (1990) IEEE ISSCC , pp. 48-49
    • Allmon, R.1
  • 6
    • 0032643254 scopus 로고    scopus 로고
    • Reliability-constrained area optimization of VLSI power/ground network via sequence of linear programming
    • (1999) 36th DAC , pp. 78-83
    • Tan, X.1    Shi, C.2
  • 7
    • 0034853864 scopus 로고    scopus 로고
    • Fast power/ground network optimization based on equivalent circuit modeling
    • (2001) 38th DAC , pp. 550-554
    • Tan, X.1    Shi, C.2
  • 15
    • 0030704451 scopus 로고    scopus 로고
    • Power supply noise analysis methodology for deep-submicron vlsi chip design
    • (1997) 34th DAC
    • Chen, H.1
  • 18
    • 0014630193 scopus 로고
    • Electromigration failure modes in aluminum metallization for semiconductor devices
    • (1969) Proc. of IEEE , pp. 1587
    • Black, J.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.