Power constrained test scheduling using power profile manipulation

ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings

Volumn 5, Issue , 2001, Pages 251-254

  Rosinger, Paul M ^a   Al Hashimi, Bashir M ^a   Nicolici, Nicola ^a  

^a UNIVERSITY OF SOUTHAMPTON   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

APPROXIMATION MODEL; BENCHMARK CIRCUIT; MANIPULATION TECHNIQUES; POWER PROFILE; TEST APPLICATION TIME; TEST SCHEDULING; TEST SCHEDULING ALGORITHM; TEST SEQUENCE;

ALGORITHMS; APPROXIMATION THEORY; BENCHMARKING; CMOS INTEGRATED CIRCUITS; CONSTRAINT THEORY; MATHEMATICAL MODELS; SWITCHING;

SCHEDULING ALGORITHMS;

POWER ELECTRONICS;

EID: 0035012550     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

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