Achieving 550 MHz in an ASIC methodology

Proceedings - Design Automation Conference

Volumn , Issue , 2001, Pages 420-425

  Chinnery, D G ^a   Nikolic B ^a   Keutzer, K ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

ASIC; Clock; Comparison; Custom; Frequency; Speed; Throughput

Indexed keywords

DATA TRANSFER; FLIP FLOP CIRCUITS; LOGIC DESIGN; NATURAL FREQUENCIES; TIMING CIRCUITS;

DISK DRIVES;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 0034853861     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/378239.378542     Document Type: Conference Paper

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