Multi-cycle path detection based on propositional satisfiability with CNF simplification using adaptive variable insertion

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Volumn E83-A, Issue 12, 2000, Pages 2600-2607

  Nakamura, Kazuhiro ^a   Maruoka, Shinji ^a   Kimura, Shinji ^a   Watanabe, Katsurnasa ^a  

^a NARA INSTITUTE OF SCIENCE AND TECHNOLOGY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK SYNTHESIS; HEURISTIC METHODS; INTEGRATED CIRCUIT LAYOUT; LOGIC CIRCUITS; THEOREM PROVING;

ADAPTIVE VARIABLE INSERTIONS; MULTI-CYCLE PATH DETECTIONS;

VLSI CIRCUITS;

EID: 0034516553     PISSN: 09168508     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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