Fsimac: A fault simulator for asynchronous sequential circuits

Proceedings of the Asian Test Symposium

Volumn , Issue , 2000, Pages 114-119

  Sur Kolay, Susmita ^a   Roncken, Marly ^b   Stevens, Ken ^b   Chaudhuri, Parimal Pal ^c   Roy, Rob ^d  

^a INDIAN STATISTICAL INSTITUTE   (India)

^b INTEL CORPORATION   (United States)

^c INDIAN INSTITUTE OF ENGINEERING SCIENCE AND TECHNOLOGY   (India)

^d Mobilian Corporation   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

GATE-LEVEL FAULT SIMULATORS;

ALGORITHMS; CELLULAR ARRAYS; COMPUTER AIDED NETWORK ANALYSIS; COMPUTER SIMULATION; ELECTRIC NETWORK SYNTHESIS; FAULT TOLERANT COMPUTER SYSTEMS; FEEDBACK CONTROL; ITERATIVE METHODS;

ASYNCHRONOUS SEQUENTIAL LOGIC;

EID: 0034496879     PISSN: 10817735     EISSN: None     Source Type: Journal    
DOI: 10.1109/ATS.2000.893612     Document Type: Article

References (18)

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