Timing analysis for extended burst-mode circuits

Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems

Volumn , Issue , 1997, Pages 101-111

  Chakraborty, Supratik ^a   Dill, David L ^a   Yun, Kenneth Y ^a   Chang, Kun Yung ^a  

^a STANFORD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; DELAY CIRCUITS; ELECTRIC NETWORK ANALYSIS; LOGIC GATES;

EXTENDED BURST MODE CIRCUITS;

DIGITAL CIRCUITS;

EID: 0030678725     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (27)