Test quality of asynchronous circuits: A defect-oriented evaluation

IEEE International Test Conference (TC)

Volumn , Issue , 1996, Pages 205-214

  Roncken, Marly ^a   Bruls, Eric ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DEFECTS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING;

DESIGN FOR TEST (DFT) METHOD;

ASYNCHRONOUS SEQUENTIAL LOGIC;

EID: 0030400761     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (22)