Deep submicron CMOS based on silicon germanium technology

IEEE Transactions on Electron Devices

Volumn 43, Issue 6, 1996, Pages 911-918

  O'Neill, A G ^a   Antoniadis, D A ^b  

^a Department of Civil and Environmental Engineering   (United States)

^b NEWCASTLE UNIVERSITY   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRON TRANSPORT PROPERTIES; HETEROJUNCTION BIPOLAR TRANSISTORS; MOSFET DEVICES; SEMICONDUCTING SILICON; SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR DEVICE MANUFACTURE; SILICA;

CHANNEL DOPING; CUTOFF FREQUENCY; DRAIN INDUCED BARRIER LOWERING; HETEROJUNCTION FIELD EFFECT TRANSISTORS; LATTICE MISMATCH; SHORT CHANNEL EFFECTS; THRESHOLD VOLTAGE;

CMOS INTEGRATED CIRCUITS;

EID: 0030172689     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.502123     Document Type: Article

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