Reducing power by optimizing the necessary precision/range of floating-point arithmetic

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 8, Issue 3, 2000, Pages 273-286

  Tong, Jonathan Ying Fai ^a,b,c   Nagle, David ^a,b   Rutenbar, Rob A ^a,b  

^a IEEE

^b CARNEGIE MELLON UNIVERSITY   (United States)

^c MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; CODES (STANDARDS); COMPUTER SIMULATION; ELECTRIC POWER SUPPLIES TO APPARATUS;

LOW POWER SYSTEMS; MANTISSA BITWIDTH; SOFTWARE PACKAGE SPICE;

DIGITAL ARITHMETIC;

EID: 0033718137     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/92.845894     Document Type: Article

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