-
1
-
-
85031533337
-
-
Wildforce Board Web Page
-
Annapolis Micro Systems, Wildforce Board Web Page, http://www.annapmicro.com.
-
Annapolis Micro Systems
-
-
-
2
-
-
0003392013
-
StarT the next generation: Integrating global caches and dataflow architecture
-
G.R. Gao, L. Bic, J.-L. Gaudiot (Eds.), IEEE Computer Society Press, Silver Spring, MD
-
B.S. Ang, Arvind, D. Chiou, StarT the next generation: integrating global caches and dataflow architecture, in: G.R. Gao, L. Bic, J.-L. Gaudiot (Eds.), Advanced Topics in Dataflow Computing and Multithreading, IEEE Computer Society Press, Silver Spring, MD, 1995, pp. 19-54.
-
(1995)
Advanced Topics in Dataflow Computing and Multithreading
, pp. 19-54
-
-
Ang, B.S.1
Arvind2
Chiou, D.3
-
3
-
-
0343668464
-
Start-voyager: A flexible platform for exploring scalable snip issues
-
Computation Structures Group, MIT Lab. for Comput. Sci., December
-
B.S. Ang, D. Chiou, D. Rosenband, M. Ehrlich, L. Rudolph, Arvind, Start-voyager: a flexible platform for exploring scalable snip issues, CSG Memo 415, Computation Structures Group, MIT Lab. for Comput. Sci., December 1998.
-
(1998)
CSG Memo
, vol.415
-
-
Ang, B.S.1
Chiou, D.2
Rosenband, D.3
Ehrlich, M.4
Rudolph, L.5
Arvind6
-
4
-
-
0025404493
-
Executing a program on the MIT tagged-token dataflow architecture
-
Arvind, R.S. Nikhil, Executing a program on the MIT tagged-token dataflow architecture, IEEE Trans. Comput. 39 (3) (1990) 300-318.
-
(1990)
IEEE Trans. Comput.
, vol.39
, Issue.3
, pp. 300-318
-
-
Arvind1
Nikhil, R.S.2
-
5
-
-
0020088789
-
The U-interpreter
-
Arvind, K.P. Gostelow, The U-interpreter, Computer 15 (2) (1982) 42-49.
-
(1982)
Computer
, vol.15
, Issue.2
, pp. 42-49
-
-
Arvind1
Gostelow, K.P.2
-
8
-
-
0027561268
-
Processor reconfiguration through instruction set metamorphosis
-
P.M. Athanas, H.F. Silverman, Processor reconfiguration through instruction set metamorphosis, Computer 26 (1993) 11-18.
-
(1993)
Computer
, vol.26
, pp. 11-18
-
-
Athanas, P.M.1
Silverman, H.F.2
-
9
-
-
0003665531
-
M-structures: Extending a parallel, non-strict, functional language with state
-
Computation Structures Group, MIT Lab. for Comput. Sci., March
-
P.S. Barth, R.S. Nikhil, Arvind, M-structures: extending a parallel, non-strict, functional language with state, CSG Memo 327, Computation Structures Group, MIT Lab. for Comput. Sci., March 1991.
-
(1991)
CSG Memo
, vol.327
-
-
Barth, P.S.1
Nikhil, R.S.2
Arvind3
-
10
-
-
0027188325
-
Overview of the START(*T) multithreaded computer
-
Digest of Papers, San Francisco, CA, February
-
M.J. Beckerle, Overview of the START(*T) multithreaded computer, in: Digest of Papers, COMPCON Spring '93, San Francisco, CA, February 1993, pp. 148-156.
-
(1993)
COMPCON Spring '93
, pp. 148-156
-
-
Beckerle, M.J.1
-
12
-
-
0026220148
-
The synchronous approach to reactive and real-time systems
-
A. Benveniste, G. Berry, The synchronous approach to reactive and real-time systems, in: Proceedings of the IEEE, vol. 79 (9), 1991, pp. 1270-1282.
-
(1991)
Proceedings of the IEEE
, vol.79
, Issue.9
, pp. 1270-1282
-
-
Benveniste, A.1
Berry, G.2
-
13
-
-
84962483264
-
Data-flow synchronous languages
-
J.W. de Bakker, W.-P. de Roever, G. Rozenberg (Eds.), A Decade of Concurrency - Reflections and Perspectives, Springer, Berlin
-
A. Benveniste, P. Caspi, P. Le Guernic, N. Halbwachs, Data-flow synchronous languages, in: J.W. de Bakker, W.-P. de Roever, G. Rozenberg (Eds.), A Decade of Concurrency - Reflections and Perspectives, Lecture Notes in Computer Science, vol. 803, Springer, Berlin, 1994, pp. 1-45.
-
(1994)
Lecture Notes in Computer Science
, vol.803
, pp. 1-45
-
-
Benveniste, A.1
Caspi, P.2
Le Guernic, P.3
Halbwachs, N.4
-
14
-
-
1642347084
-
Programmable active memories: A performance assesment
-
G. Borriello, C. Ebeling (Eds.), MIT Press, Cambridge, MA
-
P. Bertin, D. Roncin, J. Vuillemin, Programmable active memories: a performance assesment, in: G. Borriello, C. Ebeling (Eds.), Research on Integrated Systems, MIT Press, Cambridge, MA, 1993, pp. 88-102.
-
(1993)
Research on Integrated Systems
, pp. 88-102
-
-
Bertin, P.1
Roncin, D.2
Vuillemin, J.3
-
15
-
-
0028738052
-
PAM programming environments: Practice and experience
-
IEEE Computer Soc. Press, Los Alamitos, CA
-
P. Bertin, H. Touati, PAM programming environments: practice and experience, in: Proceedings of the IEEE Workshop on FPGAs for Custom Computing Machines, IEEE Computer Soc. Press, Los Alamitos, CA, 1994, pp. 133-139.
-
(1994)
Proceedings of the IEEE Workshop on FPGAs for Custom Computing Machines
, pp. 133-139
-
-
Bertin, P.1
Touati, H.2
-
16
-
-
0028737370
-
Static scheduling of multi-rate and cyclostatic DSP applications
-
IEEE Press, New York
-
G. Bilsen, M. Engels, R. Lauwereins, J.A. Peperstraete, Static scheduling of multi-rate and cyclostatic DSP applications, in: Proceedings of the 1994 Workshop on VLSI Signal Processing, IEEE Press, New York, 1994.
-
(1994)
Proceedings of the 1994 Workshop on VLSI Signal Processing
-
-
Bilsen, G.1
Engels, M.2
Lauwereins, R.3
Peperstraete, J.A.4
-
18
-
-
0027151598
-
Scheduling dynamic dataflow graphs with bounded memory using the token flow model
-
Minneapolis, MN, April
-
J.T. Buck, E.A. Lee, Scheduling dynamic dataflow graphs with bounded memory using the token flow model, in: Proceedings of the IEEE International Conference on Acoustics, Speech, and Signal Processing, vol. I, Minneapolis, MN, April 1993, pp. 429-132.
-
(1993)
Proceedings of the IEEE International Conference on Acoustics, Speech, and Signal Processing
, vol.1
, pp. 429-1132
-
-
Buck, J.T.1
Lee, E.A.2
-
19
-
-
0003496051
-
Scheduling dynamic dataflow draphs with bounded memory using the token flow model
-
Ph.D. Dissertation, Department of EECS, University of California, Berkeley, CA 94720
-
J.T. Buck, Scheduling dynamic dataflow draphs with bounded memory using the token flow model, Technical Report UCB/ERL 93/69, Ph.D. Dissertation, Department of EECS, University of California, Berkeley, CA 94720, 1993.
-
(1993)
Technical Report UCB/ERL 93/69
-
-
Buck, J.T.1
-
20
-
-
0001325987
-
Ptolemy: A framework for simulating and prototyping heterogeneous systems (special issue on Simulation Software Development)
-
J.T. Buck, S. Ha, E.A. Lee, D.G. Messerschmitt, Ptolemy: a framework for simulating and prototyping heterogeneous systems (special issue on Simulation Software Development) Int. J. Comput. Simulation, 4 (1994) 155-182 (http://ptolemy.eecs.berkeley.edu/papers/JEurSim).
-
(1994)
Int. J. Comput. Simulation
, vol.4
, pp. 155-182
-
-
Buck, J.T.1
Ha, S.2
Lee, E.A.3
Messerschmitt, D.G.4
-
21
-
-
85033660515
-
Static scheduling and code generation from dynamic dataflow graphs with integer-valued control systems
-
Invited Paper, 31 October-2 November, Pacific Grove, CA
-
J.T. Buck, Static scheduling and code generation from dynamic dataflow graphs with integer-valued control systems, Invited Paper, in: Proceedings of the IEEE Asilomar Conference on Signals, Systems, and Computers, 31 October-2 November, Pacific Grove, CA, 1994.
-
(1994)
Proceedings of the IEEE Asilomar Conference on Signals, Systems, and Computers
-
-
Buck, J.T.1
-
22
-
-
0003707211
-
-
IEEE CS Press, Silver Spring, MD
-
D.A. Buell, J.M. Arnold, W.J. Kleinfelder, Splash 2: FPGAs in a Custom Computing Machine, IEEE CS Press, Silver Spring, MD, 1996.
-
(1996)
Splash 2: FPGAs in a Custom Computing Machine
-
-
Buell, D.A.1
Arnold, J.M.2
Kleinfelder, W.J.3
-
23
-
-
0031645555
-
Managing pipeline-reconfigurable FPGAs
-
S. Cadambi, J. Weener, S.C. Goldstein, H. Schmit, D.E. Thomas, Managing pipeline-reconfigurable FPGAs, in: Sixth International Symposium on Field Programmable Gate Arrays, 1998.
-
(1998)
Sixth International Symposium on Field Programmable Gate Arrays
-
-
Cadambi, S.1
Weener, J.2
Goldstein, S.C.3
Schmit, H.4
Thomas, D.E.5
-
24
-
-
85031529382
-
-
Carnegie-Mellon University
-
R. Carley, S.C. Goldstein, T. Mukherjee, R. Rutenbar, H. Schmit, D. Thomas, PipeRench Web Page, Carnegie-Mellon University, http://www.ece.cmu.edu/research/piperench/.
-
PipeRench Web Page
-
-
Carley, R.1
Goldstein, S.C.2
Mukherjee, T.3
Rutenbar, R.4
Schmit, H.5
Thomas, D.6
-
25
-
-
85013273251
-
-
CSG Memo 371, Computation Structures Group, MIT Lab. for Comput. Sci., February
-
D. Chiou, B.S. Ang, Arvind, M.J. Beckerle, A. Boughton, R. Greiner, J.E. Hicks, J.C. Hoe, StarT-NG: delivering seamless parallel computing, CSG Memo 371, Computation Structures Group, MIT Lab. for Comput. Sci., February 1995.
-
(1995)
StarT-NG: Delivering Seamless Parallel Computing
-
-
Chiou, D.1
Ang, B.S.2
Arvind3
Beckerle, M.J.4
Boughton, A.5
Greiner, R.6
Hicks, J.E.7
Hoe, J.C.8
-
26
-
-
0026371865
-
Ganglion - A fast hardware implementation of a connectionist classifier
-
IEEE Press, New York
-
C.E. Cox, W. Ekkehard Blanz, Ganglion - a fast hardware implementation of a connectionist classifier, in: Proceedings of the IEEE Custom Integrated Circuits Conference, IEEE Press, New York, 1991, pp. 6.5.1-6.5.4.
-
(1991)
Proceedings of the IEEE Custom Integrated Circuits Conference
, pp. 651-654
-
-
Cox, C.E.1
Ekkehard Blanz, W.2
-
27
-
-
84882484230
-
The CM-2X: A hybrid CM-2/Xilinx prototype
-
IEEE Computer Soc. Press, Los Alamitos, CA
-
S.A. Cuccaro, C.F. Reese, The CM-2X: a hybrid CM-2/Xilinx prototype, in: Proceedings of the IEEE Workshop on FPGAs for Custom Computing Machines, IEEE Computer Soc. Press, Los Alamitos, CA, 1993, pp. 121-131.
-
(1993)
Proceedings of the IEEE Workshop on FPGAs for Custom Computing Machines
, pp. 121-131
-
-
Cuccaro, S.A.1
Reese, C.F.2
-
28
-
-
0020087077
-
Data flow program graphs
-
A.L. Davis, R.M. Keller, Data flow program graphs, Computer 15 (2) (1982) 26-41.
-
(1982)
Computer
, vol.15
, Issue.2
, pp. 26-41
-
-
Davis, A.L.1
Keller, R.M.2
-
29
-
-
0012733101
-
Comparing computing machines
-
Configurable Computing: Technology and Applications, November
-
A. DeHon, Comparing computing machines, in: Configurable Computing: Technology and Applications, Proceedings of SPIE 3526, November 1998, p. 124.
-
(1998)
Proceedings of SPIE
, vol.3526
, pp. 124
-
-
DeHon, A.1
-
30
-
-
84937641774
-
First version of a data-flow procedure language
-
Proceedings of the Colloque sur la Programmation, Paris, France, April 9-11, Springer, Berlin
-
J.B. Dennis, First version of a data-flow procedure language, in: Proceedings of the Colloque sur la Programmation, Lecture Notes in Computer Science, vol. 19, Paris, France, April 9-11, Springer, Berlin, 1974, pp. 362-376.
-
(1974)
Lecture Notes in Computer Science
, vol.19
, pp. 362-376
-
-
Dennis, J.B.1
-
31
-
-
0342363275
-
Data flow ideas for supercomputers
-
Digest of Papers, San Francisco, CA, February-March
-
J.B. Dennis, Data flow ideas for supercomputers, in: Digest of Papers, COMPCON Spring '84, San Francisco, CA, February-March 1984, pp. 15-19.
-
(1984)
COMPCON Spring '84
, pp. 15-19
-
-
Dennis, J.B.1
-
32
-
-
0024172357
-
An efficient pipelined dataflow processor architecture
-
Orlando, FL, November
-
J.B. Dennis, G.R. Gao, An efficient pipelined dataflow processor architecture, in: Proceedings of the Supercomputing '88, Orlando, FL, November 1988, pp. 368-373.
-
(1988)
Proceedings of the Supercomputing '88
, pp. 368-373
-
-
Dennis, J.B.1
Gao, G.R.2
-
33
-
-
0004160487
-
-
ACAPS Technical Memo 29, School of Computer Science, McGill University, Montréal, Qué., February
-
J.B. Dennis, G.R. Gao, Multithreaded architectures: principles, projects, and issues, ACAPS Technical Memo 29, School of Computer Science, McGill University, Montréal, Qué., February 1994, in: ftp://ftp-acaps.cs.mcgill.ca/pub/doc/memos.
-
(1994)
Multithreaded Architectures: Principles, Projects, and Issues
-
-
Dennis, J.B.1
Gao, G.R.2
-
34
-
-
0002911580
-
Multithreaded architectures: Principles, projects, and issues
-
R.A. Iannucci, G.R. Gao, R.H. Halstead Jr., B. Smith (Eds.), chapter 1, Kluwer Academic Publishers, Norwel 1, Massachusetts
-
J.B. Dennis, G.R. Gao, Multithreaded architectures: principles, projects, and issues, in: R.A. Iannucci, G.R. Gao, R.H. Halstead Jr., B. Smith (Eds.), Multithreaded Computer Architecture: A Summary of the State of the Art, chapter 1, Kluwer Academic Publishers, Norwel 1, Massachusetts, 1994.
-
(1994)
Multithreaded Computer Architecture: A Summary of the State of the Art
-
-
Dennis, J.B.1
Gao, G.R.2
-
35
-
-
85031525130
-
-
ACAPS Technical Memo 90, School of Computer Science, McGill University, Montréal, Qué., December.
-
J.B. Dennis, G.R. Gao, On memory models and cache management for shared-memory multiprocessors, ACAPS Technical Memo 90, School of Computer Science, McGill University, Montréal, Qué., December. 1994, in: ftp://ftp-acaps.cs.mcgill.ca/pub/doc/memos.
-
(1994)
On Memory Models and Cache Management for Shared-memory Multiprocessors
-
-
Dennis, J.B.1
Gao, G.R.2
-
36
-
-
0343260141
-
Streams data types for signal processing
-
J-L. Gaudiot, L. Bic (Eds.), Prentice-Hall, Englewood Cliffs, NJ
-
J.B. Dennis, Streams data types for signal processing, in: J-L. Gaudiot, L. Bic (Eds.), Advanced Topics in Dataflow Computing and Multithreading, Prentice-Hall, Englewood Cliffs, NJ, 1995.
-
(1995)
Advanced Topics in Dataflow Computing and Multithreading
-
-
Dennis, J.B.1
-
37
-
-
0029480744
-
On memory models and cache management for shared-memory multiprocessors
-
IEEE Computer Soc.
-
J.B. Dennis, G.R. Gao, On memory models and cache management for shared-memory multiprocessors, in: Parallel and Distributed Processing, IEEE Computer Soc., 1995.
-
(1995)
Parallel and Distributed Processing
-
-
Dennis, J.B.1
Gao, G.R.2
-
38
-
-
85014824479
-
A parallel program execution model supporting modular software construction
-
IEEE Computer Soc.
-
J.B. Dennis, A parallel program execution model supporting modular software construction, in: Proceedings of the Massively Parallel Programming Models (MPPM-97), IEEE Computer Soc., 1997, pp 50-60.
-
(1997)
Proceedings of the Massively Parallel Programming Models (MPPM-97)
, pp. 50-60
-
-
Dennis, J.B.1
-
39
-
-
0343260140
-
General parallel computation can be performed with a cycle-free heap
-
Paris, France, October
-
J.B. Dennis, General parallel computation can be performed with a cycle-free heap, in: Proceedings of the International Conference on Parallel Architectures and Compiler Technology, Paris, France, October 1996, pp. 96-103.
-
(1996)
Proceedings of the International Conference on Parallel Architectures and Compiler Technology
, pp. 96-103
-
-
Dennis, J.B.1
-
41
-
-
0012089174
-
Parallel processing in a restructurable computer system
-
G. Estrin, Parallel processing in a restructurable computer system, IEEE Trans. Elect. Comput. (1963).
-
(1963)
IEEE Trans. Elect. Comput.
-
-
Estrin, G.1
-
43
-
-
85014840507
-
Towards an efficient hybrid dataflow architecture model
-
G.R. Gao, H.H.J. Hum, J.-M. Monti, Towards an efficient hybrid dataflow architecture model, in: Proceedings of the PARLE '91, vol. I, Lecture Notes in Computer Science, vol. 505, Eindhoven, The Netherlands, June 1991, Springer, Berlin, pp. 355-371.
-
Proceedings of the PARLE '91
, vol.1
-
-
Gao, G.R.1
Hum, H.H.J.2
Monti, J.-M.3
-
44
-
-
85014840507
-
-
Eindhoven, The Netherlands, June Springer, Berlin
-
G.R. Gao, H.H.J. Hum, J.-M. Monti, Towards an efficient hybrid dataflow architecture model, in: Proceedings of the PARLE '91, vol. I, Lecture Notes in Computer Science, vol. 505, Eindhoven, The Netherlands, June 1991, Springer, Berlin, pp. 355-371.
-
(1991)
Lecture Notes in Computer Science
, vol.505
, pp. 355-371
-
-
-
45
-
-
80455123249
-
Well-behaved dataflow for DSP computation
-
San Francisco, March
-
G.R. Gao, R. Govindarajan, P. Panangaden, Well-behaved dataflow for DSP computation, in: Proceedings of the ICASSP-92, San Francisco, March 1992.
-
(1992)
Proceedings of the ICASSP-92
-
-
Gao, G.R.1
Govindarajan, R.2
Panangaden, P.3
-
46
-
-
38248998953
-
An efficient hybrid dataflow architecture model
-
G.R. Gao, An efficient hybrid dataflow architecture model, J. Parallel Distrib. Comput. 19 (4) (1993) 293-307.
-
(1993)
J. Parallel Distrib. Comput.
, vol.19
, Issue.4
, pp. 293-307
-
-
Gao, G.R.1
-
47
-
-
0343260136
-
-
ACAPS Technical Memo 78, School of Computer Science, McGill University, Montréal, Qué., December
-
G.R. Gao, V. Sarkar, Location consistency: stepping beyond the barriers of memory coherence and serializability, ACAPS Technical Memo 78, School of Computer Science, McGill University, Montréal, Qué., December 1994, in: ftp://ftp-acaps.cs.mcgill.ca/pub/doc/memos.
-
(1994)
Location Consistency: Stepping Beyond the Barriers of Memory Coherence and Serializability
-
-
Gao, G.R.1
Sarkar, V.2
-
48
-
-
0343695778
-
Advanced Topics in Dataflow Computing and Multithreading
-
IEEE Computer Soc. Press, New York, 1995, Hamilton Island, Australia, May
-
G.R. Gao, L. Bic, J-L. Gaudiot (Eds.), Advanced Topics in Dataflow Computing and Multithreading, IEEE Computer Soc. Press, New York, 1995, book contains papers presented at the Second International Workshop on Dataflow Computers, Hamilton Island, Australia, May 1992.
-
(1992)
International Workshop on Dataflow Computers
-
-
Gao, G.R.1
Bic, L.2
Gaudiot, J.-L.3
-
49
-
-
67649876831
-
On the importance of an end-to-end view of memory consistency in future computer systems
-
Fukuoka, Japan
-
G.R. Gao, V. Sarkar, On the importance of an end-to-end view of memory consistency in future computer systems, in: Proceedings of the International Symposium on High Performance Computing, Fukuoka, Japan, 1997, pp. 30-41.
-
(1997)
Proceedings of the International Symposium on High Performance Computing
, pp. 30-41
-
-
Gao, G.R.1
Sarkar, V.2
-
50
-
-
0003525466
-
-
CAPSL Technical Memo 16, Department of Elec. and Computer Engineering, University of Delaware, Newark, Delaware, February
-
G.R. Gao, V. Sarkar, Location consistency - a new memory model and cache consistency protocol, CAPSL Technical Memo 16, Department of Elec. and Computer Engineering, University of Delaware, Newark, Delaware, February 1998, in: ftp://ftp.capsl.udel.edu/pub/doc/memos.
-
(1998)
Location Consistency - A New Memory Model and Cache Consistency Protocol
-
-
Gao, G.R.1
Sarkar, V.2
-
51
-
-
0343260131
-
Revision to 'memory consistency and event ordering in scalable shared-memory multiprocessors
-
Computer Systems Lab., Stanford University, Stanford, CA, April
-
K. Gharachorloo, A. Gupta, J. Hennessy, Revision to 'memory consistency and event ordering in scalable shared-memory multiprocessors', Technical Report No. CSL-TR-93-568, Computer Systems Lab., Stanford University, Stanford, CA, April 1993.
-
(1993)
Technical Report No. CSL-TR-93-568
-
-
Gharachorloo, K.1
Gupta, A.2
Hennessy, J.3
-
52
-
-
0025433762
-
Memory consistency and event ordering in scalable shared-memory multiprocessors
-
Seattle, Washington, May
-
K. Gharachorloo, D. Lenoski, J. Laudon, P. Gibbons, A. Gupta, J. Hennessy, Memory consistency and event ordering in scalable shared-memory multiprocessors, in: Proceedings of the ISCA-17, Seattle, Washington, May 1990, pp. 15-26.
-
(1990)
Proceedings of the ISCA-17
, pp. 15-26
-
-
Gharachorloo, K.1
Lenoski, D.2
Laudon, J.3
Gibbons, P.4
Gupta, A.5
Hennessy, J.6
-
53
-
-
0032688082
-
Hierarchical finite state machines with multiple concurrency models
-
Revised from Memorandum UCB/ERL M97/57, Electronics Research Laboratory, University of California, Berkeley, CA 94720, August 1997
-
A. Girault, B. Lee, E.A. Lee, Hierarchical finite state machines with multiple concurrency models, IEEE Trans, on CAD, 1999, 18 (6) (1999). (Revised from Memorandum UCB/ERL M97/57, Electronics Research Laboratory, University of California, Berkeley, CA 94720, August 1997) (http://ptolemy.eecs.berkeley.edu/papers/98/starcharts).
-
(1999)
IEEE Trans, on CAD, 1999
, vol.18
, Issue.6
-
-
Girault, A.1
Lee, B.2
Lee, E.A.3
-
54
-
-
0025807368
-
Building and using a highly parallel programmable logic array
-
M. Gokhale, W. Holmes, A. Kopser, S. Lucas, R. Minnich, D. Sweely, D. Lopresti, Building and using a highly parallel programmable logic array, IEEE Comput. 24 (1991) 81-89.
-
(1991)
IEEE Comput.
, vol.24
, pp. 81-89
-
-
Gokhale, M.1
Holmes, W.2
Kopser, A.3
Lucas, S.4
Minnich, R.5
Sweely, D.6
Lopresti, D.7
-
57
-
-
85031526702
-
-
ACAPS Technical Memo 101, School of Computer Science, McGill University, Montréal, Qué., March
-
L.J. Hendren, G.R. Gao, X. Tang, Y. Zhu, X. Xue, H. Cai, P. Ouellet, Compiling C for the EARTH multithreaded architecture, ACAPS Technical Memo 101, School of Computer Science, McGill University, Montréal, Qué., March 1996, in: ftp://ftp-acaps.cs.mcgill.ca/pub/doc/memos.
-
(1996)
Compiling C for the EARTH Multithreaded Architecture
-
-
Hendren, L.J.1
Gao, G.R.2
Tang, X.3
Zhu, Y.4
Xue, X.5
Cai, H.6
Ouellet, P.7
-
58
-
-
0032138592
-
Multiprocessors should support simple memory-consistency models
-
M.D. Hill, Multiprocessors should support simple memory-consistency models, Computer 31 (1998) 28-34.
-
(1998)
Computer
, vol.31
, pp. 28-34
-
-
Hill, M.D.1
-
59
-
-
0030656163
-
Mapping multirate dataflow to complex RT level hardware models
-
Architectures and Processors, ASAP'97.
-
J. Horstmannshoff, T. Grötker, H. Meyr, Mapping multirate dataflow to complex RT level hardware models, in: 11th International Conference on Application-specific Systems, Architectures and Processors, 1997, (ASAP'97).
-
(1997)
11th International Conference on Application-specific Systems
-
-
Horstmannshoff, J.1
Grötker, T.2
Meyr, H.3
-
60
-
-
0343695774
-
-
Ph.D. Thesis, McGill University, Montréal, Qué., May
-
H.H.-J. Hum, The super-actor machine: a hybrid dataflow/von Neumann architecture, Ph.D. Thesis, McGill University, Montréal, Qué., May 1992.
-
(1992)
The Super-actor Machine: A Hybrid Dataflow/von Neumann Architecture
-
-
Hum, H.H.-J.1
-
61
-
-
0026926392
-
A high-speed memory organization for hybrid dataflow/von Neumann computing
-
H.H.J. Hum, G.R. Gao, A high-speed memory organization for hybrid dataflow/von Neumann computing, Future Generation Comput. Syst. 8 (4) (1992) 287-301.
-
(1992)
Future Generation Comput. Syst.
, vol.8
, Issue.4
, pp. 287-301
-
-
Hum, H.H.J.1
Gao, G.R.2
-
62
-
-
0030216001
-
A study of the earth-manna multithreaded system
-
H.H.J. Hum, O. Maquelin, K.B. Theobald, X. Tian, G.R. Gao, L.J. Hendren, A study of the earth-manna multithreaded system, Int. J. Parallel Programming 24 (4) (1996) 319-347.
-
(1996)
Int. J. Parallel Programming
, vol.24
, Issue.4
, pp. 319-347
-
-
Hum, H.H.J.1
Maquelin, O.2
Theobald, K.B.3
Tian, X.4
Gao, G.R.5
Hendren, L.J.6
-
63
-
-
0023672809
-
Toward a dataflow/von Neumann hybrid architecture
-
Honolulu, Haw., May-June
-
R.A. Iannucci, Toward a dataflow/von Neumann hybrid architecture, in: Proceedings of the ISCA-15, Honolulu, Haw., May-June 1988, pp. 131-140.
-
(1988)
Proceedings of the ISCA-15
, pp. 131-140
-
-
Iannucci, R.A.1
-
64
-
-
0343260126
-
Multithreaded Computer Architecture: A Summary of the State of the Art
-
Kluwer Academic Publishers, Norwell, Massachusetts, 1994, Albuquerque, New Mexico, November
-
R.A. Iannucci, G.R. Gao, R.H. Halstead Jr., B. Smith (Eds.), Multithreaded Computer Architecture: A Summary of the State of the Art, Kluwer Academic Publishers, Norwell, Massachusetts, 1994, book contains papers presented at the Workshop on Multithreaded Computers, Albuquerque, New Mexico, November 1991.
-
(1991)
Workshop on Multithreaded Computers
-
-
Iannucci, R.A.1
Gao, G.R.2
Halstead R.H., Jr.3
Smith, B.4
-
65
-
-
0342825282
-
Exploiting locality and tolerating remote memory access latency using thread migration
-
in press
-
S. Jenks, J.-L. Gaudiot, Exploiting locality and tolerating remote memory access latency using thread migration, Int. J. Parallel Programming, 1996, in press.
-
(1996)
Int. J. Parallel Programming
-
-
Jenks, S.1
Gaudiot, J.-L.2
-
66
-
-
0029748995
-
Nomadic threads - A migrating multithreaded approach to remote memory accesses in multiprocessors
-
Boston, Massachusetts, October
-
S. Jenks, J.-L. Gaudiot, Nomadic threads - a migrating multithreaded approach to remote memory accesses in multiprocessors, in: Proceedings of the International Conference on Parallel Architectures and Compilation Techniques (PACT '96), Boston, Massachusetts, October 1996.
-
(1996)
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques (PACT '96)
-
-
Jenks, S.1
Gaudiot, J.-L.2
-
67
-
-
0029748995
-
Nomadic threads: A migrating multithreaded approach to remote memory accesses in multiprocessors
-
Boston, Massachusetts, October
-
S. Jenks, J.-L. Gaudiot, Nomadic threads: A migrating multithreaded approach to remote memory accesses in multiprocessors, in: Proceedings of the 1996 Conference on Parallel Architectures and Compilation Techniques, Boston, Massachusetts, October 1996.
-
(1996)
Proceedings of the 1996 Conference on Parallel Architectures and Compilation Techniques
-
-
Jenks, S.1
Gaudiot, J.-L.2
-
69
-
-
0026221661
-
The synchronous data flow programming language LUSTRE
-
N. Halbwachs, P. Caspi, P. Raymond, D. Pilaud, The synchronous data flow programming language LUSTRE, in: Proceedings of the IEEE, vol. 79 (9), pp. 1305-1319.
-
Proceedings of the IEEE
, vol.79
, Issue.9
, pp. 1305-1319
-
-
Halbwachs, N.1
Caspi, P.2
Raymond, P.3
Pilaud, D.4
-
70
-
-
0023365727
-
Statecharts: A visual formalism for complex systems
-
D. Harel, Statecharts: a visual formalism for complex systems, Sci. Comput. Programming 8 (1987) 31-274.
-
(1987)
Sci. Comput. Programming
, vol.8
, pp. 31-274
-
-
Harel, D.1
-
71
-
-
0000087207
-
The semantics of a simple language for parallel programming
-
North-Holland, Amsterdam
-
G. Kahn, The semantics of a simple language for parallel programming, in: Proceedings of the IFIP Congress 74, North-Holland, Amsterdam, 1974.
-
(1974)
Proceedings of the IFIP Congress
, vol.74
-
-
Kahn, G.1
-
73
-
-
0024088366
-
A data-driven VLSI array for arbitrary algorithms
-
I. Koren, B. Mendelson, I. Peled, G.M. Silberman, A data-driven VLSI array for arbitrary algorithms, Computer 21 (10) (1988) 30-43.
-
(1988)
Computer
, vol.21
, Issue.10
, pp. 30-43
-
-
Koren, I.1
Mendelson, B.2
Peled, I.3
Silberman, G.M.4
-
75
-
-
0342825276
-
A prototype of a highly parallel dataflow machine EM-4 and its preliminary evaluation
-
October
-
Y. Kodama, S. Sakai, Y. Yamaguchi, A prototype of a highly parallel dataflow machine EM-4 and its preliminary evaluation, in: Proceedings of the InfoJapan 90, October 1990, pp. 291-298.
-
(1990)
Proceedings of the InfoJapan
, vol.90
, pp. 291-298
-
-
Kodama, Y.1
Sakai, S.2
Yamaguchi, Y.3
-
76
-
-
0029190495
-
The EM-X parallel computer: Architecture and basic performance
-
Santa Margher ita Ligure, Italy, June
-
Y. Kodama, H. Sakane, M. Sato, H. Yamana, S. Sakai, Y. Yamaguchi, The EM-X parallel computer: architecture and basic performance, in: Proceedings of the ISCA-22, Santa Margher ita Ligure, Italy, June 1995, pp. 14-23.
-
(1995)
Proceedings of the ISCA-22
, pp. 14-23
-
-
Kodama, Y.1
Sakane, H.2
Sato, M.3
Yamana, H.4
Sakai, S.5
Yamaguchi, Y.6
-
77
-
-
85031534880
-
-
KRI, Khoral Research Inc. Web Page
-
KRI, Khoral Research Inc. Web Page, http://www.kri.com.
-
-
-
-
79
-
-
0018518477
-
How to make a multiprocessor computer that correctly executes multiprocess programs
-
L. Lamport, How to make a multiprocessor computer that correctly executes multiprocess programs, IEEE Trans. Comput. 28 (9) (1979) 690-691.
-
(1979)
IEEE Trans. Comput.
, vol.28
, Issue.9
, pp. 690-691
-
-
Lamport, L.1
-
80
-
-
0003582061
-
-
IEEE Press, New York
-
P. Lapsley, J. Bier, A. Shoham, E.A. Lee, DSP Processor Fundamentals Architectures and Features, IEEE Press, New York, 1997.
-
(1997)
DSP Processor Fundamentals Architectures and Features
-
-
Lapsley, P.1
Bier, J.2
Shoham, A.3
Lee, E.A.4
-
81
-
-
0026222682
-
Programming real-time applications with SIGNAL
-
P. Le Guernic, T. Gauthier, M. Le Borgne, C. Le Maire, Programming real-time applications with SIGNAL, Proc. IEEE 79 (9) (1991).
-
(1991)
Proc. IEEE
, vol.79
, Issue.9
-
-
Le Guernic, P.1
Gauthier, T.2
Le Borgne, M.3
Le Maire, C.4
-
82
-
-
0023138886
-
Static scheduling of synchronous data flow programs for digital signal processing
-
E.A. Lee, D.G. Messerschmitt, Static scheduling of synchronous data flow programs for digital signal processing, IEEE Trans. Comput. (1987).
-
(1987)
IEEE Trans. Comput.
-
-
Lee, E.A.1
Messerschmitt, D.G.2
-
84
-
-
0029309183
-
Dataflow process networks
-
E.A. Lee, T.M. Parks, Dataflow process networks, Proc. IEEE 83 (5) (1995) 773-801.
-
(1995)
Proc. IEEE
, vol.83
, Issue.5
, pp. 773-801
-
-
Lee, E.A.1
Parks, T.M.2
-
85
-
-
0347599492
-
A denotational semantics for dataflow with firing
-
Electronics Research Laboratory, UC Berkeley, January
-
E.A. Lee, A denotational semantics for dataflow with firing, Memorandum UCB/ERL M97/3, Electronics Research Laboratory, UC Berkeley, January 1997.
-
(1997)
Memorandum UCB/ERL M97/3
-
-
Lee, E.A.1
-
86
-
-
0026865505
-
The DASH prototype: Implementation and performance
-
Gold Coast, Australia, May
-
D. Lenoski, J. Laudon, T. Joe, D. Nakahira, L. Stevens, A. Gupta, J. Hennessy. The DASH prototype: implementation and performance, in: Proceedings of the ISCA-19, Gold Coast, Australia, May 1992, pp. 92-103.
-
(1992)
Proceedings of the ISCA-19
, pp. 92-103
-
-
Lenoski, D.1
Laudon, J.2
Joe, T.3
Nakahira, D.4
Stevens, L.5
Gupta, A.6
Hennessy, J.7
-
87
-
-
0029728259
-
I-structure software cache: A split-phase transaction runtime cache system
-
Boston, Massachusetts, October
-
W.-Y. Lin, J.-L. Gaudiot, I-structure software cache: a split-phase transaction runtime cache system, in: Proceedings of the 1996 Conference on Parallel Architectures and Compilation Techniques, Boston, Massachusetts, October 1996, pp. 122-126.
-
(1996)
Proceedings of the 1996 Conference on Parallel Architectures and Compilation Techniques
, pp. 122-126
-
-
Lin, W.-Y.1
Gaudiot, J.-L.2
-
88
-
-
0031343311
-
Seeking solutions in configurable computing
-
W.H. Mangione-Smith, Seeking solutions in configurable computing, IEEE Comput. 30 (1997) 38-43.
-
(1997)
IEEE Comput.
, vol.30
, pp. 38-43
-
-
Mangione-Smith, W.H.1
-
89
-
-
0342390520
-
Application design for configurable computing
-
W.H. Mangione-Smith, Application design for configurable computing, Computer 30 (1997) 115-117.
-
(1997)
Computer
, vol.30
, pp. 115-117
-
-
Mangione-Smith, W.H.1
-
91
-
-
84956624959
-
Costs and benefits of multithreading with off-the-shelf RISC processors
-
Proceedings of the EURO-PAR '95, no. 966 Stockholm, Sweden, Springer, August
-
O.C. Maquelin, H.H.J. Hum, G.R. Gao, Costs and benefits of multithreading with off-the-shelf RISC processors, in: Proceedings of the EURO-PAR '95, no. 966 in Lecture Notes in Computer Science, Stockholm, Sweden, Springer, August 1995, pp. 117-128.
-
(1995)
Lecture Notes in Computer Science
, pp. 117-128
-
-
Maquelin, O.C.1
Hum, H.H.J.2
Gao, G.R.3
-
92
-
-
0343695761
-
-
CAPSL Technical Memo 18, Department of Elec. and Computer Engineering, University of Delaware, Newark, Delaware, March
-
A. Marquez, K.B. Theobald, X. Tang, T. Sterling, G.R. Gao, A superstrand architecture and its compilation, CAPSL Technical Memo 18, Department of Elec. and Computer Engineering, University of Delaware, Newark, Delaware, March 1998.
-
(1998)
A Superstrand Architecture and Its Compilation
-
-
Marquez, A.1
Theobald, K.B.2
Tang, X.3
Sterling, T.4
Gao, G.R.5
-
93
-
-
85031530772
-
A superstrand architecture and its compilation
-
Orlando, FL, January
-
A. Marquez, K.B. Theobald, X. Tang, G.R. Gao, A superstrand architecture and its compilation, in: Proceedings of the MTEAC99 Workshop held in conjunction with HPCA-5, Orlando, FL, January 1999.
-
(1999)
Proceedings of the MTEAC99 Workshop Held in Conjunction with HPCA-5
-
-
Marquez, A.1
Theobald, K.B.2
Tang, X.3
Gao, G.R.4
-
94
-
-
0342825269
-
Designing special purpose co-processors using the data-flow paradigm
-
J.-L. Gaudiot, L. Bic (Eds.), Prentice-Hall, Englewood Cliffs, NJ
-
B. Mendelson, B. Patel, I. Koren, Designing special purpose co-processors using the data-flow paradigm, in: J.-L. Gaudiot, L. Bic (Eds.), Advanced Topics in Data-Flow Computing, Prentice-Hall, Englewood Cliffs, NJ, 1991, pp. 547-570.
-
(1991)
Advanced Topics in Data-Flow Computing
, pp. 547-570
-
-
Mendelson, B.1
Patel, B.2
Koren, I.3
-
95
-
-
0023209763
-
Mapping data flow programs on a VLSI array of processors
-
Pittsburgh, Pennsylvania, June
-
B. Mendelson, G.M. Silberman, Mapping data flow programs on a VLSI array of processors, in: Proceedings of the International Symposium on Computer Architecture, Pittsburgh, Pennsylvania, June 1987, pp. 72-80.
-
(1987)
Proceedings of the International Symposium on Computer Architecture
, pp. 72-80
-
-
Mendelson, B.1
Silberman, G.M.2
-
96
-
-
0026865635
-
An analysis of loop latency in dataflow execution
-
Gold Coast, Australia, May
-
W.A. Najjar, W.M. Miller, A.P.W. Böhm, An analysis of loop latency in dataflow execution, in: Proceedings of the ISCA-19, Gold Coast, Australia, May 1992, pp. 352-360.
-
(1992)
Proceedings of the ISCA-19
, pp. 352-360
-
-
Najjar, W.A.1
Miller, W.M.2
Böhm, A.P.W.3
-
97
-
-
0023537003
-
Multi-level execution in data-flow architectures
-
St. Charles, Ill., August
-
W. Najjar, J.-L. Gaudiot, Multi-level execution in data-flow architectures, in: Proceedings of the ICPP '87, St. Charles, Ill., August 1987, pp. 32-39.
-
(1987)
Proceedings of the ICPP '87
, pp. 32-39
-
-
Najjar, W.1
Gaudiot, J.-L.2
-
98
-
-
85031528018
-
-
Colorado State University, Fort Collins, CO
-
W. Najjar, A.P.W. Bohm, B. Draper, R. Beveridge, The Cameron Project, Colorado State University, Fort Collins, CO 1998, http://www.cs.colostate.edu/cameron.
-
(1998)
The Cameron Project
-
-
Najjar, W.1
Bohm, A.P.W.2
Draper, B.3
Beveridge, R.4
-
100
-
-
0024667829
-
Can dataflow subsume von Neumann computing?
-
Jerusalem, Israel, May-June
-
R.S. Nikhil, Arvind, Can dataflow subsume von Neumann computing? in: Proceedings of the ISCA-16, Jerusalem, Israel, May-June 1989, pp. 262-272.
-
(1989)
Proceedings of the ISCA-16
, pp. 262-272
-
-
Nikhil, R.S.1
Arvind2
-
101
-
-
0029727974
-
Multithread execution mechanisms on RICA-1 for massi vely parallel computation
-
Boston, Massachusetts, October
-
K. Okamoto, S. Sakai, H. Matsuoka, T. Yokota, H. Hirono, Multithread execution mechanisms on RICA-1 for massi vely parallel computation, in: Proceedings of the 1996 Conference on Parallel Architectures and Compilation Techniques, Boston, Massachusetts, October 1996, pp. 116-121.
-
(1996)
Proceedings of the 1996 Conference on Parallel Architectures and Compilation Techniques
, pp. 116-121
-
-
Okamoto, K.1
Sakai, S.2
Matsuoka, H.3
Yokota, T.4
Hirono, H.5
-
102
-
-
0004041853
-
-
Oxford Hardware Compilation Group
-
Oxford Hardware Compilation Group, The Handel Language, 1997.
-
(1997)
The Handel Language
-
-
-
103
-
-
0012133243
-
Algorithm analysis and mapping environment for adaptive computing systems
-
MIT Lincoln Labs, Lexington, MA, September
-
E.K. Pauer, C.S. Myers, P.D. Fiore, J.M. Smith, C.M. Crawford, E.A. Lee, J. Lundblad, C.X. Hylands, Algorithm analysis and mapping environment for adaptive computing systems, Second Annual Workshop on High Performance Embedded Computing, MIT Lincoln Labs, Lexington, MA, September 1998 (http://ptolemy.eecs.berkeley.edu/papers/98/ACSmapping/).
-
(1998)
Second Annual Workshop on High Performance Embedded Computing
-
-
Pauer, E.K.1
Myers, C.S.2
Fiore, P.D.3
Smith, J.M.4
Crawford, C.M.5
Lee, E.A.6
Lundblad, J.7
Hylands, C.X.8
-
104
-
-
0003230019
-
The KHOROS application development environment
-
J.L. Crowley (Ed.), HICa, New Jersey
-
J. Rasure, S. Kubica, The KHOROS application development environment, in: J.L. Crowley (Ed.), Experimental Environments for Computer Vision and Image Processing, HICa, New Jersey, 1994.
-
(1994)
Experimental Environments for Computer Vision and Image Processing
-
-
Rasure, J.1
Kubica, S.2
-
105
-
-
0028346515
-
Tempest and typhoon: User-level shared memory
-
Chicago, III, April
-
S.K. Reinhardt, J.R. Larus, D.A. Wood, Tempest and typhoon: user-level shared memory, in: Proceedings of the ISCA-21, Chicago, III, April 1994, pp. 325-336.
-
(1994)
Proceedings of the ISCA-21
, pp. 325-336
-
-
Reinhardt, S.K.1
Larus, J.R.2
Wood, D.A.3
-
106
-
-
0012524096
-
-
Ph.D. Thesis, University of Delaware, Newark, DE, April
-
X. Tang. Compiling for multithreaded architectures, Ph.D. Thesis, University of Delaware, Newark, DE, April 1999.
-
(1999)
Compiling for Multithreaded Architectures
-
-
Tang, X.1
-
107
-
-
84956632282
-
Super-threading: Architectural and software mechanisms for optimizing parallel computation
-
Tokyo, Japan, July
-
S. Sakai, K. Okamoto, H. Matsuoka, H. Hirono, Y. Kodama, M. Sato, Super-threading: architectural and software mechanisms for optimizing parallel computation, in: Conference Proceedings of the 1993 International Conference on Supercomputing, Tokyo, Japan, July 1993, pp. 251-260.
-
(1993)
Conference Proceedings of the 1993 International Conference on Supercomputing
, pp. 251-260
-
-
Sakai, S.1
Okamoto, K.2
Matsuoka, H.3
Hirono, H.4
Kodama, Y.5
Sato, M.6
-
109
-
-
0027632671
-
Scaling parallel programs for multiprocessors: Methodology and examples
-
J.P. Singh, J.L. Hennessy, A. Gupta, Scaling parallel programs for multiprocessors: methodology and examples, IEEE Computer 6 (26) (1993) 42-50.
-
(1993)
IEEE Computer
, vol.6
, Issue.26
, pp. 42-50
-
-
Singh, J.P.1
Hennessy, J.L.2
Gupta, A.3
-
110
-
-
0031068502
-
Data and workload distribution in a multithreaded architecture
-
A. Sohn, M. Sato, N. Yoo, J.-L. Gaudiot, Data and workload distribution in a multithreaded architecture, J. Parallel Distributed Process. 1997, pp. 256-264.
-
(1997)
J. Parallel Distributed Process
, pp. 256-264
-
-
Sohn, A.1
Sato, M.2
Yoo, N.3
Gaudiot, J.-L.4
-
111
-
-
0030652307
-
Thread partitioning and scheduling based on cost model
-
Newport, R hode Island, June
-
X. Tang, J. Wang, K.B. Theobald, G.R. Gao, Thread partitioning and scheduling based on cost model, in: Proceedings of the SPAA '97, Newport, R hode Island, June 1997, pp. 272-281.
-
(1997)
Proceedings of the SPAA '97
, pp. 272-281
-
-
Tang, X.1
Wang, J.2
Theobald, K.B.3
Gao, G.R.4
-
114
-
-
0026867086
-
Active messages: A mechanism for integrated communication and computation
-
Gold Coast, Australia, May
-
T. von Eicken, D.E. Culler, S.C. Goldstein, K.E. Schauser, Active messages: a mechanism for integrated communication and computation, in: Proceedings of the ISCA-19, Gold Coast, Australia, May 1992, pp. 256-266.
-
(1992)
Proceedings of the ISCA-19
, pp. 256-266
-
-
Von Eicken, T.1
Culler, D.E.2
Goldstein, S.C.3
Schauser, K.E.4
-
115
-
-
0030104367
-
Programmable active memories: Reconfigurable systems come of age
-
J. Vuillemin et al., Programmable active memories: reconfigurable systems come of age, IEEE Trans. on VLSI Syst. (1996).
-
(1996)
IEEE Trans. on VLSI Syst.
-
-
Vuillemin, J.1
-
116
-
-
0031236158
-
Baring it all to software: Raw machines
-
E. Waingold, M. Taylor, D. Srikrishna, V. Srakar, W. Lee, V. Lee, J. Kim, M. Frank, P. Finch, R. Barua, J. Babb, S. Amarsinghe, A. Agrawal, Baring it all to software: raw machines, IEEE Comput. 30 (1997) 86-93.
-
(1997)
IEEE Comput.
, vol.30
, pp. 86-93
-
-
Waingold, E.1
Taylor, M.2
Srikrishna, D.3
Srakar, V.4
Lee, W.5
Lee, V.6
Kim, J.7
Frank, M.8
Finch, P.9
Barua, R.10
Babb, J.11
Amarsinghe, S.12
Agrawal, A.13
-
117
-
-
0027747808
-
A parallel hashed oct-tree n-body algorithm
-
Portland, Oregon, November
-
M. Warren, J.K. Salmon, A parallel hashed oct-tree n-body algorithm, in: Proceedings of the Supercomputing '93, Portland, Oregon, November 1993, pp. 12-21.
-
(1993)
Proceedings of the Supercomputing '93
, pp. 12-21
-
-
Warren, M.1
Salmon, J.K.2
-
118
-
-
0343695731
-
Architectural improvements for a data-driven vlsi processing array
-
S. Weiss, I. Spillinger, G.M. Silberman, Architectural improvements for a data-driven vlsi processing array, J. Parallel Distributed Comput. 19 (4) (1993) 308-322.
-
(1993)
J. Parallel Distributed Comput.
, vol.19
, Issue.4
, pp. 308-322
-
-
Weiss, S.1
Spillinger, I.2
Silberman, G.M.3
-
120
-
-
0029521829
-
DISC : The dynamic instruction set computer
-
J. Schewel (Ed.)
-
M.J. Wirthlin, B.L. Hutchings, DISC : the dynamic instruction set computer, in: J. Schewel (Ed.), Field Programmable Gate Arrays for Fast Board Development and Reconfigurable Computing, vol. SPIE 2607, 1995, pp. 92-103.
-
(1995)
Field Programmable Gate Arrays for Fast Board Development and Reconfigurable Computing
, vol.2607 SPIE
, pp. 92-103
-
-
Wirthlin, M.J.1
Hutchings, B.L.2
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