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Volumn 3526, Issue , 1998, Pages 124-133

Comparing computing machines

Author keywords

Computational density; Configurable computing; FPGA; Performance comparison; Programmable architectures

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; COSTS; FIR FILTERS; MICROPROCESSOR CHIPS; PERFORMANCE; SEMICONDUCTING SILICON; VLSI CIRCUITS;

EID: 0012733101     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.327025     Document Type: Conference Paper
Times cited : (24)

References (31)
  • 1
    • 0003651029 scopus 로고
    • Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124
    • Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124. The Programmable Logic Data Book, 1994.
    • (1994) The Programmable Logic Data Book
  • 3
    • 0029322021 scopus 로고
    • Mos transistors: Scaling and performance trends
    • June
    • M. Bohr, "Mos transistors: Scaling and performance trends," Semiconductor International, pp. 75-79, June 1995.
    • (1995) Semiconductor International , pp. 75-79
    • Bohr, M.1
  • 4
    • 0029547914 scopus 로고
    • Interconnect scaling - The real limiter to high performance ulsi
    • Electron Devices Society of IEEE, December
    • M. Bohr, "Interconnect scaling - The real limiter to high performance ulsi," in International Electron Devices Meeting 1995 Technical Digest, pp. 241-244, Electron Devices Society of IEEE, December 1995.
    • (1995) International Electron Devices Meeting 1995 Technical Digest , pp. 241-244
    • Bohr, M.1
  • 9
    • 0002799279 scopus 로고
    • Fast integer multipliers fit in fpgas
    • May 12
    • K. D. Chapman, "Fast integer multipliers fit in fpgas," EDN 39, p. 80, May 12 1993.
    • (1993) EDN , vol.39 , pp. 80
    • Chapman, K.D.1
  • 16
    • 0037541255 scopus 로고    scopus 로고
    • Signal processing with xilinx fpgas
    • June
    • B. Newgard, "Signal processing with xilinx fpgas." , June 1996.
    • (1996)
    • Newgard, B.1
  • 17
    • 0038555515 scopus 로고    scopus 로고
    • Altera Corporation, 2610 Orchard Parkway, San Jose, CA 95134-2020, January
    • Altera Corporation, 2610 Orchard Parkway, San Jose, CA 95134-2020, AN 73: Implementing FIR Filters in FLEX Devices, January 1996. .
    • (1996) AN 73: Implementing FIR Filters in FLEX Devices
  • 18
    • 0024646119 scopus 로고
    • The architectures and design of a 20-mhz real-time dsp chip set
    • April
    • P. Ruetz, "The architectures and design of a 20-mhz real-time dsp chip set," IEEE Journal of Solid-State Circuits 24, pp. 338-348, April 1989.
    • (1989) IEEE Journal of Solid-State Circuits , vol.24 , pp. 338-348
    • Ruetz, P.1
  • 20
    • 0026898370 scopus 로고
    • A configurable convolution chip with prorammable coefficients
    • July
    • D. Reuver and H. Klar, "A configurable convolution chip with prorammable coefficients," IEEE Journal of Solid-State Circuits 27, pp. 1121-1123, July 1992.
    • (1992) IEEE Journal of Solid-State Circuits , vol.27 , pp. 1121-1123
    • Reuver, D.1    Klar, H.2
  • 23
    • 0026821944 scopus 로고
    • An 85-mhz fourth-order programmable iir digital filter chip
    • February
    • M. Hatamian and K. K. Parhi, "An 85-mhz fourth-order programmable iir digital filter chip," IEEE Journal of Solid-State Circuits 27, pp. 175-183, February 1992.
    • (1992) IEEE Journal of Solid-State Circuits , vol.27 , pp. 175-183
    • Hatamian, M.1    Parhi, K.K.2
  • 25
    • 4243873642 scopus 로고    scopus 로고
    • Architectural considerations for cryptanalytic hardware
    • CS252 Report; May
    • I. Goldberg and D. Wagner, "Architectural considerations for cryptanalytic hardware," CS252 Report , May 1996.
    • (1996)
    • Goldberg, I.1    Wagner, D.2
  • 26
    • 0022219496 scopus 로고
    • A systolic array for rapid string comparison
    • H. Fuchs, ed.
    • R. Lipton and D. Lopresti, "A systolic array for rapid string comparison," in 1985 Chapel Hill Conference on VLSI, H. Fuchs, ed., pp. 363-376, 1985.
    • (1985) 1985 Chapel Hill Conference on VLSI , pp. 363-376
    • Lipton, R.1    Lopresti, D.2
  • 29
    • 0023844325 scopus 로고
    • Cmos gate array implementation of sparc
    • IEEE, February
    • L. Quach and R. Chueh, "Cmos gate array implementation of sparc," in Digest of Papers COMPCON'88, pp. 14-17, IEEE, February 1988.
    • (1988) Digest of Papers COMPCON'88 , pp. 14-17
    • Quach, L.1    Chueh, R.2
  • 31
    • 0023382868 scopus 로고
    • P-nac: A systolic array for computing nucleic acid sequences
    • July
    • D. Lopresti, "P-nac: A systolic array for computing nucleic acid sequences," IEEE Computer 20, pp. 98-99, July 1987.
    • (1987) IEEE Computer , vol.20 , pp. 98-99
    • Lopresti, D.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.