Stress-induced leakage current in p+ poly MOS capacitors with poly-Si and poly-Si0.7Ge0.3 gate material

IEEE Electron Device Letters

Volumn 20, Issue 7, 1999, Pages 314-316

  Houtsma, V E ^a   Holleman, J ^a   Salm, C ^a   Widdershoven, F P ^b   Woerlee, P H ^a,b  

^a UNIVERSITY OF TWENTE   (Netherlands)

^b PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CURRENT MEASUREMENT; ELECTRIC FIELDS; ELECTRON TUNNELING; GATES (TRANSISTOR); INTEGRATION; LEAKAGE CURRENTS; OXIDES; POLYCRYSTALLINE MATERIALS; SEMICONDUCTING BORON; SEMICONDUCTING SILICON; SEMICONDUCTOR DOPING;

CAPACITANCE VOLTAGE CHARACTERISTICS; FOWLER-NORDHEIM TUNNELING; GATE BIAS POLARITY; NEGATIVE GATE BIAS; OXIDE RELIABILITY; PMOS CAPACITORS; POLYSILICON GATE MATERIAL; STRESS INDUCED LEAKAGE CURRENTS; VALENCE BAND TUNNELING;

MOS CAPACITORS;

EID: 0033164894     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.772361     Document Type: Article

References (10)

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