Design considerations of high-K gate dielectrics for sub-O.l-Mm MOSFET's

IEEE Transactions on Electron Devices

Volumn 46, Issue 1, 1999, Pages 261-262

  Cheng, Baohong ^a,c   Cao, Min ^a   Voorde, Paul Vande ^a,b   Greene, Wayne ^a,c   Stork, Hans ^a   Yu, Zhiping ^a,b   Woo, Jason C S ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b HEWLETT PACKARD LABORATORIES   (United States)

^c Stanford University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ASPECT RATIO; COMPUTER SIMULATION; DEGRADATION; DIELECTRIC MATERIALS; GATES (TRANSISTOR); PERMITTIVITY; SEMICONDUCTOR DEVICE STRUCTURES;

GATE DIELECTRICS;

MOSFET DEVICES;

EID: 0032733417     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.737469     Document Type: Article

References (9)

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