Key measurements of ultrathin gate dielectric reliability and in-line monitoring

IBM Journal of Research and Development

Volumn 43, Issue 3, 1999, Pages 407-416

  Abadeer, W W ^a   Bagramian, A ^a   Conkle, D W ^a   Griffin, C W ^a   Langlois, E ^a   Lloyd, B F ^a   Mallette, R P ^a   Massucco, J E ^a   McKenna, J M ^a   Mittl, S W ^a   Noel, P H ^a  

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; INTEGRATED CIRCUIT MANUFACTURE; MICROPROCESSOR CHIPS; OXIDES; RANDOM ACCESS STORAGE; RELIABILITY; SEMICONDUCTOR DEVICE STRUCTURES;

GATE DIELECTRICS; IN-LINE MONITORING; STATIC RANDOM ACCESS MEMORY CHIP;

DIELECTRIC MATERIALS;

EID: 0032680401     PISSN: 00188646     EISSN: None     Source Type: Journal    
DOI: 10.1147/rd.433.0407     Document Type: Article

References (23)

1. The National Technology Roadmap for Semiconductors: Technology Needs, Semiconductor Industry Association, San Jose, CA, 1997.
2. T. Kuroi, S. Shimizu, S. Ogino, A. Teramoto, M. Shirahata, Y. Okumura, and M. Inuishi, "Sub-Quarter-Micron Dual Gate CMOSFETs with Ultrathin Gate Oxide of 2nm," Digest of Technical Papers, Symposium on VLSI Technology, 1996, p. 210.
3. A. I. Chou, C. Lin, K. Kumar, P. Chowdhury, M. Gardner, M. Gilmer, J. Fulford, and J. C. Lee, "The Effects of Nitrogen Implant into Gate Electrode on the Characterization of Dual-gate MOSFETs with Ultrathin Oxide and Oxynitrides," Proceedings of the International Reliability Physics Symposium, 1997, p. 174.
4. B. Maiti, "Nitrided Oxides in CMOS Technology," International Reliability Physics Symposium (IRPS) Tutorial Proceedings, 1998, Section 3, p. 3.1.
5. R. Degraeve, J. L. Ogier, R. Bellens, Ph. Roussel, G. Groeseneken, and H. E. Macs, "On the Field Dependence of Intrinsic and Extrinsic Time-Dependent Dielectric Breakdown," Proceedings of the International Reliability Physics Symposium, 1996, p. 44.
6. J. L. Ogier, R. Degraeve, P. Roussel, G. Groeseneken, and H. E. Maes, "Analysis of the Early Failure Rate Prediction of Time-Dependent Dielectric Breakdown in Thin Oxides," Proceedings of the European Solid State Device Research Conference (ESSDERC), 1995, p. 299.
7. W. R. Hunter, "A Failure Rate Based Methodology for Determining the Maximum Operating Gate Electric Field, Comprehending Defect Density and Burn-In," Proceedings of the International Reliability Physics Symposium, 1996, p. 37.
8. 2," IEEE Electron Device Lett. ED-7, 164 (1986).
9. David J. Dumn, Sai K. Mopuri, S. Vanchinathan, R. S. Scott, R. Subramoniam, and Terrill C. Lewis, "High-Field Related Thin Oxide Wearout and Breakdown," IEEE Trans. Electron Devices 42, 760 (1995).
10. 2," Appl. Phys. Lett. 30, 601 (1977).
11. 2," Proceedings of the International Reliability Physics Symposium, 1994, p. 120.
12. 2 Dielectric Breakdown," Proceedings of the International Reliability Physics Symposium, 1997, p. 156.
13. 2 Films Thermally Grown on a Heavily Doped Si Substrate -Characterization and Modeling," IEEE Trans. Electron Devices ED-34, 1540 (1987).
14. R. Degraeve, G. Groeseneken, R. Bellens, M. Depas, and H. E. Macs, "A Consistent Model for the Thickness Dependence of Intrinsic Breakdown in Ultrathin Oxides," Proceedings of the International Electron Devices Meeting, 1995, p. 863.
15. R. Degraeve, J. De Blauwe, J. L. Ogier, Ph. Roussel, G. Groeseneken, and H. E. Maes, "A New Polarity Dependence of the Reduced Trap Generation During High-Field Degradation of Nitrided Oxides," Proceedings of the International Electron Devices Meeting, 1996, p. 327.
16. J. H. Stathis, "Quantitative Model of the Thickness Dependence of Breakdown in Ultra Thin Oxides," Microelectron. Eng. 36, 325 (1997).
17. D. J. Dimaria and J. H. Stathis, "Ultimate Limit for Defect Generation in Ultrathin Silicon Dioxides," Appl. Phys. Lett. 71, 3230 (1997).
18. R.-P. Vollertsen and W. W. Abadeer, "Comprehensive Gate-Oxide Reliability Evaluation for DRAM Processes," Microlectron. & Reliabil. 36, 1631 (1996).
19. L. Su, S. Subbanna, E. Crabbe, P. Agnello, E. Nowak, R. Schulz, S. Rauch, H. Ng, T. Newmann, A. Ray, M. Hargrove, A. Acovic, J. Snare, S. Crowder, B. Chen, J. Sun, and B. Davari, "A High-Performance 0.8 μm CMOS," Proceedings of the 1996 Symposium on VLSI Technology, 1996, p. 12.
20. J. H. Stathis and D. J. DiMaria, "Reliability Projection for Ultrathin Oxides at Low Voltage," Proceedings of the International Electron Devices Meeting, 1998, p. 167.
21. M. Shatzkes, M. Av-Ron, and K. V. Srikrishnan, "Determination of Reliability from Ramped Voltage Breakdown Experiments; Application to Dual Dielectric MIM Capacitors," Proceedings of the 2nd International Reliability Physics Symposium, 1984, pp. 138-139.
22. 2," Thin Solid Films 91, 217 (1982).
23. E. S. Anolick and Li Yu Chen, "Application of Step Stress to Time-Dependent Breakdown," Proceedings of the 19th International Reliability Physics Symposium, 1981, pp. 23-27.