Comprehensive gate-oxide reliability evaluation for dram processes

Microelectronics Reliability

Volumn 36, Issue 11-12 SPEC. ISS., 1996, Pages 1631-1638

  Vollertsen, R P ^a   Abadeer, W W ^b  

^a IBM   (United States)

^b IBM MICROELECTRONICS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC BREAKDOWN OF SOLIDS; FAILURE ANALYSIS; GATES (TRANSISTOR); INTEGRATED CIRCUIT TESTING; OXIDES; RELIABILITY; SEMICONDUCTOR DEVICE MODELS; STRESSES; ELECTRIC CURRENTS; SEMICONDUCTOR DEVICE STRUCTURES; STRESS ANALYSIS;

GATE OXIDE RELIABILITY; DYNAMIC RANDOM ACCESS MEMORIES (DRAMS); FAILURE MECHANISMS;

RANDOM ACCESS STORAGE;

EID: 0030273974     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/0026-2714(96)00162-x     Document Type: Article

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