Moderated degradation enhancement of lateral pnp transistors due to measurement bias

IEEE Transactions on Nuclear Science

Volumn 45, Issue 6 PART 1, 1998, Pages 2644-2648

  Witczak, S C ^a   Schrimpf, R D ^b   Barnaby, H J ^b   Lacoe, R C ^b   Mayer, D C ^b   Galloway, K F ^c   Pease, R L ^c,d   Fleetwood, D M ^d  

^a AEROSPACE CORPORATION   (United States)

^b VANDERBILT UNIVERSITY   (United States)

^c RLP Research   (United States)

^d SANDIA NATIONAL LABORATORIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC RESISTANCE; ELECTRON TRAPS; INTERFACES (MATERIALS); IRRADIATION; METALLIZING; RADIATION EFFECTS; RADIATION HARDENING; SEMICONDUCTOR DEVICE TESTING;

ACCELERATED HARDNESS ASSURANCE TESTS; CARRIER INJECTION; INTERFACE TRAP CHARGING;

BIPOLAR TRANSISTORS;

EID: 0032306852     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/23.736509     Document Type: Article

References (12)

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