Dual-polycide gate technology using regrowth amorphous-si to suppress lateral dopant diffusion

IEEE Transactions on Electron Devices

Volumn 44, Issue 9, 1997, Pages 1460-1466

  Koike, Hidetoshi ^a   Unno, Yukari ^a   Matsuoka, Fumitomo ^a   Kakumu, Masakazu ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

AMORPHOUS SILICON; ANNEALING; DIFFUSION IN SOLIDS; GATES (TRANSISTOR);

DUAL POLYCIDE GATE TECHNOLOGY;

CMOS INTEGRATED CIRCUITS;

EID: 0031237435     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.622602     Document Type: Article

References (11)

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