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Manufacturers do not systematically precise in their data sheets the presence of lateral PI>IP transistors in the circuit design. The majority of them provide simplified schematic diagrams without information about current sources. So, we cannot affirm that the use of lateral PNP transistors is a general rule in the design of operational amplifiers
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Manufacturers do not systematically precise in their data sheets the presence of lateral PI>IP transistors in the circuit design. The majority of them provide simplified schematic diagrams without information about current sources. So, we cannot affirm that the use of lateral PNP transistors is a general rule in the design of operational amplifiers.
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R. J. Graces, D. M. Schmidt, D. M. Fleetwood, R. L. Pease, W. E. Combs, and M. DeLaus, Hardness Assurance Issues for Lateral PNP Bipolar Junction Transistors, IEEE Trans. Nucl. ci.
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S. C. Witczak, R. D. Schrimpf, K. F. Galloway, D. M. Fleetwood, R. L. Pease, J. M. Juhl, D. M. Schmidt, W. E. Combs, and J. S. Suehle, Accelerated tests for simulating low dose rate gain degradation of (lateral and substrate PNP bipolar junction transistors, IEE Trans. Nucl. Sei. , Vol. 43, N°6 (1996).
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R. D. Schrimpf, K. F. Galloway, D. M. Fleetwood, R. L. Pease, J. M. Juhl, D. M. Schmidt, W. E. Combs, and J. S. Suehle, Accelerated Tests for Simulating Low Dose Rate Gain Degradation of Lateral and Substrate PNP Bipolar Junction Transistors, IEE Trans. Nucl. Sei.
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