메뉴 건너뛰기




Volumn 18, Issue 1, 2000, Pages 61-71

Reducing baseline defect density through modeling random defect-limited yield

Author keywords

[No Author keywords available]

Indexed keywords


EID: 0010046785     PISSN: 10810595     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article
Times cited : (11)

References (19)
  • 1
    • 0346974888 scopus 로고    scopus 로고
    • Dallas: Fabless Semiconductor Association
    • Comments by Dan Klesken of Robertson, Stephens in The 1996 Fabless Wafer Demand Forecast (Dallas: Fabless Semiconductor Association, 1996).
    • (1996) The 1996 Fabless Wafer Demand Forecast
    • Stephens1
  • 2
    • 0029304862 scopus 로고
    • Integrated Circuit Yield Management and Yield Analysis: Development and Implementation
    • CH Stapper and RJ Rosner, "Integrated Circuit Yield Management and Yield Analysis: Development and Implementation," IEEE Transactions on Semiconductor Manufacturing 8, no. 2 (1995): 95-102.
    • (1995) IEEE Transactions on Semiconductor Manufacturing , vol.8 , Issue.2 , pp. 95-102
    • Stapper, Ch.1    Rosner, R.J.2
  • 3
    • 27644592104 scopus 로고
    • Modeling of Lithography-Related Yield Losses for CAD of VLSI Circuits
    • W Maly, "Modeling of Lithography-Related Yield Losses for CAD of VLSI Circuits," IEEE Transactions on Computer-Aided Design 4, no. 3 (1985): 166-177.
    • (1985) IEEE Transactions on Computer-Aided Design , vol.4 , Issue.3 , pp. 166-177
    • Maly, W.1
  • 4
    • 0024629198 scopus 로고
    • Large-Area Fault Clusters and Fault Tolerance in VLSI Circuits: A Review
    • CH Stapper, "Large-Area Fault Clusters and Fault Tolerance in VLSI Circuits: A Review," IBM Journal of Research and Development 33, no. 2 (1989): 174-177.
    • (1989) IBM Journal of Research and Development , vol.33 , Issue.2 , pp. 174-177
    • Stapper, C.H.1
  • 7
    • 84984863288 scopus 로고    scopus 로고
    • A Comparison of Efficient Dot Throwing and Shape Shifting Extra Material Critical Area Estimation
    • Piscataway, NJ: Institute of Electrical and Electronics Engineers
    • GA Allen, "A Comparison of Efficient Dot Throwing and Shape Shifting Extra Material Critical Area Estimation," in Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (Piscataway, NJ: Institute of Electrical and Electronics Engineers, 1998), 44-52.
    • (1998) Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems , pp. 44-52
    • Allen, G.A.1
  • 9
    • 0032278345 scopus 로고    scopus 로고
    • Wafer Line Productivity Optimization in a Multi-Technology Multi-Part-Number Fabricator
    • Piscataway, NJ: Institute of Electrical and Electronics Engineers
    • D Maynard et al., "Wafer Line Productivity Optimization in a Multi-Technology Multi-Part-Number Fabricator," in Proceedings of the 9th Annual Advanced Semiconductor Manufacturing Conference and Workshop (Piscataway, NJ: Institute of Electrical and Electronics Engineers, 1998), 34-42.
    • (1998) Proceedings of the 9th Annual Advanced Semiconductor Manufacturing Conference and Workshop , pp. 34-42
    • Maynard, D.1
  • 10
    • 0033079061 scopus 로고    scopus 로고
    • Yield Modeling Based on In-Line Scanner Defect Sizing and a Circuit's Critical Area
    • LS Milor, "Yield Modeling Based on In-Line Scanner Defect Sizing and a Circuit's Critical Area," IEEE Transactions on Semiconductor Manufacturing 12, no. 1 (1999): 26-35.
    • (1999) IEEE Transactions on Semiconductor Manufacturing , vol.12 , Issue.1 , pp. 26-35
    • Milor, L.S.1
  • 11
    • 0032265936 scopus 로고    scopus 로고
    • Correlation of Digital Image Metrics to Production ADC Matching Performance
    • Piscataway, NJ: Institute of Electrical and Electronics Engineers
    • J Blais et al., "Correlation of Digital Image Metrics to Production ADC Matching Performance," in Proceedings of the 9th Annual Advanced Semiconductor Manufacturing Conference and Workshop (Piscataway, NJ: Institute of Electrical and Electronics Engineers, 1998), 86-92.
    • (1998) Proceedings of the 9th Annual Advanced Semiconductor Manufacturing Conference and Workshop , pp. 86-92
    • Blais, J.1
  • 12
    • 0033334816 scopus 로고    scopus 로고
    • A Framework for Extracting Defect Density Information for Yield Modeling from In-Line Defect Inspection for Real-Time Prediction of Random Defect Limited Yields
    • Piscataway, NJ: Institute of Electrical and Electronics Engineers
    • J Segal et al., "A Framework for Extracting Defect Density Information for Yield Modeling from In-Line Defect Inspection for Real-Time Prediction of Random Defect Limited Yields," in Proceedings of the 1999 IEEE International Symposium on Semiconductor Manufacturing (Piscataway, NJ: Institute of Electrical and Electronics Engineers, 1999), 403-406.
    • (1999) Proceedings of the 1999 IEEE International Symposium on Semiconductor Manufacturing , pp. 403-406
    • Segal, J.1
  • 14
    • 0031996613 scopus 로고    scopus 로고
    • In-Line Yield Prediction Methodologies Using Patterned Wafer Inspection Information
    • R Nurani et al., "In-Line Yield Prediction Methodologies Using Patterned Wafer Inspection Information," IEEE Transactions on Semiconductor Manufacturing 11, no. 1 (1998): 40-47.
    • (1998) IEEE Transactions on Semiconductor Manufacturing , vol.11 , Issue.1 , pp. 40-47
    • Nurani, R.1
  • 15
    • 0033355830 scopus 로고    scopus 로고
    • Application of Defect Inspection in Development of 0.25 and 0.18 Micron Technology
    • Piscataway, NJ: Institute of Electrical and Electronics Engineers
    • R Guldi et al., "Application of Defect Inspection in Development of 0.25 and 0.18 Micron Technology, in Proceedings of the 1999 IEEE International Symposium on Semiconductor Manufacturing (Piscataway, NJ: Institute of Electrical and Electronics Engineers, 1999), 135-138.
    • (1999) Proceedings of the 1999 IEEE International Symposium on Semiconductor Manufacturing , pp. 135-138
    • Guldi, R.1
  • 16
    • 0033329739 scopus 로고    scopus 로고
    • Layer Yield Estimation Based on Critical Area and Electrical Defect Monitor Data
    • Piscataway, NJ: Institute of Electrical and Electronics Engineers
    • L Milor, G Hill, and Y Peng, "Layer Yield Estimation Based on Critical Area and Electrical Defect Monitor Data," in Proceedings of the 1999 IEEE International Symposium on Semiconductor Manufacturing (Piscataway, NJ: Institute of Electrical and Electronics Engineers, 1999), 99-102.
    • (1999) Proceedings of the 1999 IEEE International Symposium on Semiconductor Manufacturing , pp. 99-102
    • Milor, L.1    Hill, G.2    Peng, Y.3
  • 19
    • 0031340902 scopus 로고    scopus 로고
    • Comparison of Defect Size Distributions Based on Electrical and Optical Measurement Procedures
    • Piscataway, NJ: Institute of Electrical and Electronics Engineers
    • C Hess and LH Weiland, "Comparison of Defect Size Distributions Based on Electrical and Optical Measurement Procedures," in Proceedings of the 7th Annual Advanced Semiconductor Manufacturing Conference and Workshop (Piscataway, NJ: Institute of Electrical and Electronics Engineers, 1996), 277-282.
    • (1996) Proceedings of the 7th Annual Advanced Semiconductor Manufacturing Conference and Workshop , pp. 277-282
    • Hess, C.1    Weiland, L.H.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.