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Volumn 234, Issue , 2011, Pages 305-316

A VLSI neuromorphic device for implementing spike-based neural networks

Author keywords

Address Event Representation (AER); Integrate and Fire (I F) neuron; learning; Neuromorphic circuits; spike based plasticity; STDP; synapse; Winner Take All (WTA)

Indexed keywords

NEURAL NETWORKS; TIMING CIRCUITS; VLSI CIRCUITS;

EID: 85140208993     PISSN: 09226389     EISSN: 18798314     Source Type: Book Series    
DOI: 10.3233/978-1-60750-972-1-305     Document Type: Conference Paper
Times cited : (9)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.