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Volumn , Issue , 2017, Pages 43-54

Chai: Collaborative heterogeneous applications for integrated-Architectures

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARKING; C++ (PROGRAMMING LANGUAGE); COMPUTER PROGRAMMING; DATA HANDLING; DISTRIBUTED COMPUTER SYSTEMS; HIGH LEVEL LANGUAGES; MEMORY ARCHITECTURE; SPECIFICATIONS;

EID: 85019024615     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISPASS.2017.7975269     Document Type: Conference Paper
Times cited : (72)

References (37)
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    • I.-J. Sung, G. Liu, and W.-M. Hwu, "DL: A data layout transformation system for heterogeneous computing, " in Innovative Parallel Computing, pp. 1 -11, 2012.
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    • Sung, I.-J.1    Liu, G.2    Hwu, W.-M.3
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    • AMD
    • AMD, "App profiler settings." http://developer.amd.com/tools-And-sdks/archive/compute/amd-App-profiler/user-guide/app-profiler-settings/.
    • App Profiler Settings
  • 23
    • 85027451719 scopus 로고    scopus 로고
    • S. Kelley. https://github.com/smskelley/canny-opencl.
    • Kelley, S.1
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    • bshaozi, September
    • bshaozi, "Compile problem." https://github.com/RadeonOpenCompute/hcc/issues/124, September 2016.
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    • Performance characterization of dataintensive kernels on AMD fusion architectures
    • K. Lee, H. Lin, and W.-c. Feng, "Performance characterization of dataintensive kernels on AMD fusion architectures, " Computer Science- Research and Development, vol. 28, no. 2-3, pp. 175-184, 2013.
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    • Lee, K.1    Lin, H.2    Feng, W.-C.3
  • 29
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    • Understanding co-run performance on CPU-GPU integrated processors: Observations, insights, directions
    • Q. Zhu, B. Wu, X. Shen, K. Shen, L. Shen, and Z. Wang, "Understanding co-run performance on CPU-GPU integrated processors: observations, insights, directions, " Frontiers of Computer Science, pp. 1-17, 2016.
    • (2016) Frontiers of Computer Science , pp. 1-17
    • Zhu, Q.1    Wu, B.2    Shen, X.3    Shen, K.4    Shen, L.5    Wang, Z.6
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    • Dynamic thread block launch: A lightweight execution mechanism to support irregular applications on GPUs
    • J. Wang, N. Rubin, A. Sidelnik, and S. Yalamanchili, "Dynamic thread block launch: A lightweight execution mechanism to support irregular applications on GPUs, " in ACM SIGARCH Computer Architecture News, vol. 43, pp. 528-540, 2015.
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    • Wang, J.1    Rubin, N.2    Sidelnik, A.3    Yalamanchili, S.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.