KLAP: Kernel launch aggregation and promotion for optimizing dynamic parallelism

Proceedings of the Annual International Symposium on Microarchitecture, MICRO

Volumn 2016-December, Issue , 2016, Pages

  Hajj, Izzat El ^a,c   Gomez Luna, Juan ^b   Li, Cheng ^a   Chang, Li Wen ^a   Milojicic, Dejan ^b   Hwu, Wen Mei ^a  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

^b UNIVERSITY OF CÓRDOBA   (Spain)

^c HEWLETT PACKARD LABORATORIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

PROGRAM COMPILERS; PROGRAM PROCESSORS;

COMPILER TECHNIQUES; GEOMETRIC MEAN;

COMPUTER ARCHITECTURE;

EID: 85009382810     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MICRO.2016.7783716     Document Type: Conference Paper

References (36)

1. S. Jones, "Introduction to dynamic parallelism, " in GPU Technology Conference Presentation, 2012.
2. W. H. Wen-mei, Heterogeneous System Architecture: A new compute platform infrastructure. Morgan Kaufmann, 2015.
3. P. Zhang, E. Holk, J. Matty, S. Misurda, M. Zalewski, J. Chu, S. McMillan, and A. Lumsdaine, "Dynamic parallelism for simple and efficient GPU graph algorithms, " in Proceedings of the 5th Workshop on Irregular Applications: Architectures and Algorithms, IA3 15, pp. 11:1-11:4, ACM, 2015.
4. M. L. Sætra, A. R. Brodtkorb, and K.-A. Lie, "Efficient GPUimplementation of adaptive mesh refinement for the shallow-water equations, " Journal of Scientific Computing, vol. 63, no. 1, pp. 23-48, 2015.
5. J. Ǵomez-Luna, L.-W. Chang, I.-J. Sung, W.-M. Hwu, and N. Guil, "Inplace data sliding algorithms for many-core architectures, " in Parallel Processing (ICPP), 2015 44th International Conference on, pp. 210-219, IEEE, 2015.
6. J. Wang and S. Yalamanchili, "Characterization and analysis of dynamic parallelism in unstructured GPU applications, " in Workload Characterization (IISWC), 2014 IEEE International Symposium on, pp. 51-60, IEEE, 2014.
7. Y. Yang and H. Zhou, "CUDA-NP: Realizing nested thread-level parallelism in GPGPU applications, " in ACM SIGPLAN Notices, vol. 49, pp. 93-106, ACM, 2014.
8. "A CUDA dynamic parallelism case study: PANDA." https://devblogs.nvidia.com/parallelforall/a-CUDA-dynamic-parallelismcase-study-panda/. Accessed: 2016-04-01.
9. J. Wang, N. Rubin, A. Sidelnik, and S. Yalamanchili, "Dynamic thread block launch: A lightweight execution mechanism to support irregular applications on GPUs, " in Proceedings of the 42nd Annual International Symposium on Computer Architecture, pp. 528-540, ACM, 2015.
10. G. Chen and X. Shen, "Free launch: optimizing GPU dynamic kernel launches through thread reuse, " in Proceedings of the 48th International Symposium on Microarchitecture, pp. 407-419, ACM, 2015.
11. T. Kaldewey, J. Hagen, A. Di Blas, and E. Sedlar, "Parallel search on video cards, " in Proceedings of the First USENIX Conference on Hot Topics in Parallelism, HotPar09, p. 9, USENIX Association, 2009.
12. D. Merrill, "CUB:kernel-level software reuse and library design, " in GPU Technology Conference Presentation, 2013.
13. P. Jääskeläinen, C. S. de La Lama, E. Schnetter, K. Raiskila, J. Takala, and H. Berg, "pocl: A performance-portable OpenCL implementation, " International Journal of Parallel Programming, vol. 43, no. 5, pp. 752-785, 2015.
14. K. Asanovic, S. W. Keckler, Y. Lee, R. Krashinsky, and V. Grover, "Convergence and scalarization for data-parallel architectures, " in Proceedings of the 2013 IEEE/ACM International Symposium on Code Generation and Optimization (CGO), pp. 1-11, IEEE Computer Society, 2013.
15. M. Billeter, O. Olsson, and U. Assarsson, "Efficient stream compaction on wide SIMD many-core architectures, " in Proceedings of the Conference on High Performance Graphics 2009, HPG 09, pp. 159-166, ACM, 2009.
16. L. Howes and A. Munshi, "The OpenCL specification, version 2.0, " Khronos Group, 2015.
17. S. Yan, G. Long, and Y. Zhang, "StreamScan: Fast scan algorithms for GPUs without global barrier synchronization, " in Proceedings of the 18th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPoPP 13, pp. 229-238, ACM, 2013.
18. A. Danalis, G. Marin, C. McCurdy, J. S. Meredith, P. C. Roth, K. Spafford, V. Tipparaju, and J. S. Vetter, "The scalable heterogeneous computing (SHOC) benchmark suite, " in Proceedings of the 3rd Workshop on General-Purpose Computation on Graphics Processing Units, GPGPU-3, pp. 63-74, ACM, 2010.
19. M. Burtscher, R. Nasre, and K. Pingali, "A quantitative study of irregular programs on GPUs, " in Workload Characterization (IISWC), 2012 IEEE International Symposium on, pp. 141-151, Nov 2012.
20. NVIDIA, "CUDA samples v. 7.5, " 2015.
21. Y. Ukidave, F. N. Paravecino, L. Yu, C. Kalra, A. Momeni, Z. Chen, N. Materise, B. Daley, P. Mistry, and D. Kaeli, "NUPAR: A benchmark suite for modern GPU architectures, " in Proceedings of the 6th ACM/SPEC International Conference on Performance Engineering, ICPE 15, pp. 253-264, ACM, 2015.
22. A. V. P. Grosset, P. Zhu, S. Liu, S. Venkatasubramanian, and M. Hall, "Evaluating graph coloring on GPUs, " in Proceedings of the 16th ACM Symposium on Principles and Practice of Parallel Programming, PPoPP 11, pp. 297-298, ACM, 2011.
23. "Matrix market." http://math.nist.gov/MatrixMarket/. Accessed: 2016-04-01.
24. N. Bell and J. Hoberock, "Thrust: A productivity-oriented library for CUDA, " GPU Computing Gems: Jade Edition, 2012.
25. "GPU pro tip: CUDA 7 streams simplify concurrency." http://devblogs.nvidia.com/parallelforall/GPU-pro-Tip-CUDA-7-streamssimplify-concurrency/. Accessed: 2016-04-01.
26. "CUDA dynamic parallelism API and principles." https://devblogs. nvidia.com/parallelforall/CUDA-dynamic-parallelism-Api-principles/. Accessed: 2016-04-10.
27. NVIDIA, "Profiler users guide v. 7.5, " 2015.
28. J. Wang, N. Rubin, A. Sidelnik, and S. Yalamanchili, "Laperm: Locality aware scheduler for dynamic parallelism on GPUs, " in The 43rd International Symposium on Computer Architecture (ISCA), June 2016.
29. M. S. Orr, B. M. Beckmann, S. K. Reinhardt, and D. A. Wood, "Finegrain task aggregation and coordination on GPUs, " in ACM SIGARCH Computer Architecture News, vol. 42, pp. 181-192, IEEE Press, 2014.
30. K. Gupta, J. A. Stuart, and J. D. Owens, "A study of persistent threads style GPU programming for gpGPU workloads, " in Innovative Parallel Computing (InPar), 2012, pp. 1-14, IEEE, 2012.
31. G. Chen and X. Shen. private communication.
32. M. Guevara, C. Gregg, K. Hazelwood, and K. Skadron, "Enabling task parallelism in the CUDA scheduler, " in Workshop on Programming Models for Emerging Architectures, vol. 9, 2009.
33. D. Li, H. Wu, and M. Becchi, "Nested parallelism on GPU: Exploring parallelization templates for irregular loops and recursive computations, " in Parallel Processing (ICPP), 2015 44th International Conference on, pp. 979-988, IEEE, 2015.
34. B. Ren, Y. Jo, S. Krishnamoorthy, K. Agrawal, and M. Kulkarni, "Efficient execution of recursive programs on commodity vector hardware, " in Proceedings of the 36th ACM SIGPLAN Conference on Programming Language Design and Implementation, pp. 509-520, ACM, 2015.
35. R. Rangan, N. Vachharajani, M. Vachharajani, and D. I. August, "Decoupled software pipelining with the synchronization array, " in Proceedings of the 13th International Conference on Parallel Architectures and Compilation Techniques, pp. 177-188, IEEE Computer Society, 2004.
36. H. Wu, G. Diamos, S. Cadambi, and S. Yalamanchili, "Kernel weaver: Automatically fusing database primitives for efficient GPU computation, " in Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture, pp. 107-118, IEEE Computer Society, 2012.