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Volumn 4, Issue 1, 2005, Pages 168-188

Synthesis of Application-Specific Highly Efficient Multi-Mode Cores for Embedded Systems

Author keywords

application specific integrated circuits (ASIC); Design; Digital signal processing (DSP); embedded systems; Experimentation; high level synthesis; Performance; reconfigurable system; Reliability; synthesis

Indexed keywords


EID: 84979977948     PISSN: 15399087     EISSN: 15583465     Source Type: Journal    
DOI: 10.1145/1053271.1053278     Document Type: Article
Times cited : (20)

References (26)
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  • 10
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    • Behavioral-level synthesis of heterogeneous bisr reconfigurable ASIC's
    • Mar
    • Guerra, L., Potkonjak, M., Rabaey, J., 1998. Behavioral-level synthesis of heterogeneous bisr reconfigurable ASIC's. IEEE Trans. VLSI Syst. 6, 1 (Mar.), 158-167.
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    • Guerra, L.1    Potkonjak, M.2    Rabaey, J.3
  • 14
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    • Synthesis of application specific programmable processors
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    • Kim, K.1    Karri, R.2    Potkonjak, M.3
  • 17
    • 0029206334 scopus 로고
    • High-level synthesis techniques for reducing the activity of functional units
    • Mussol, E., Cortadella, J., 1995. High-level synthesis techniques for reducing the activity of functional units. In International Symposium on Low Power Design. 99-104.
    • (1995) International Symposium on Low Power Design. , pp. 99-104
    • Mussol, E.1    Cortadella, J.2
  • 26
    • 0033724033 scopus 로고    scopus 로고
    • A review of high-level synthesis for dynamically reconfigurable fpgas
    • Zhang, X., Ng, K. W., 2000. A review of high-level synthesis for dynamically reconfigurable fpgas. Microprocess. Microsyst. 24, 199-211.
    • (2000) Microprocess. Microsyst. , vol.24 , pp. 199-211
    • Zhang, X.1    Ng, K.W.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.