Signal strength based switching activity modeling and estimation for DSP applications

VLSI Design

Volumn 12, Issue 2, 2001, Pages 233-243

  Chiou, L Y ^a   Muhammand, K ^a   Roy, K ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

DSP synthesis; High level power estimation; High level power modeling; Power estimation; Switching activity estimation; VLSI

Indexed keywords

ADDERS; C (PROGRAMMING LANGUAGE); COMPUTER SIMULATION; DIGITAL SIGNAL PROCESSING; ELECTRIC NETWORK SYNTHESIS; ELECTRIC POWER MEASUREMENT; ELECTRIC POWER SUPPLIES TO APPARATUS; FIR FILTERS; FREQUENCY MULTIPLYING CIRCUITS; SWITCHING; TABLE LOOKUP;

HIGH LEVEL POWER MODELING; POWER ESTIMATION; SIGNAL STRENGTH; SWITCHING ACTIVITY ESTIMATION;

VLSI CIRCUITS;

EID: 0034927706     PISSN: 1065514X     EISSN: None     Source Type: Journal    
DOI: 10.1155/2001/35832     Document Type: Article

References (11)

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6. Low-power architectural synthesis and the impact of exploiting locality
7. Low-power CMOS digital design
8. Switching characteristics of generalized array multiplier architectures and their applications to low power design
9. The carnegie mellon synthesizable digital signal processor core
10. Analytical estimation of signal transition from word-level signal statistics