DSP datapath synthesis for low-power applications

ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

Volumn 2, Issue , 2001, Pages 1165-1168

  Chiou, L Y ^a   Muhammand, K ^a   Roy, K ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; C (PROGRAMMING LANGUAGE); CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SIMULATION; ELECTRIC POWER SUPPLIES TO APPARATUS; PROGRAM COMPILERS; RESOURCE ALLOCATION; SOFTWARE PROTOTYPING; STATISTICAL METHODS;

HIGH-LEVEL SYNTHESIS TECHNIQUE; LOW POWER CONSUMPTION; SIGNAL STRENGTH BASED SWITCHING ACTIVITY MODEL;

DIGITAL SIGNAL PROCESSING;

EID: 0034855046     PISSN: 15206149     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)

1. Optimizing power using transformations
2. High-level synthesis methodology for low-power VLSI design
3. Low-power architectural synthesis and the impact of exploiting locality
4. Register-transfer level transforms for low-power data-paths
5. An ILP formulation for low power based on minimizing switched capacitance during data path allocation
6. Module assignment for low power
7. High-level modeling of switching activity with application to low-power DSP system synthesis
8. Signal strength based switching activity modeling and estimation for DSP applications
9. Switching characteristics of generalized array multiplier architectures and their applications to low power design
10. Analytical estimation of transition activity from word-level signal statistics
11. The carnegie mellon synthesizable digital signal processor core