Multi-algorithm ASIP synthesis and power estimation for DSP applications

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 2000, Pages II-621-II-624

  Cousin, J G ^a   Sentieys, O ^a   Chillet, D ^a  

^a UNIVERSITÉ DE RENNES 1   (France)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 0033718353     PISSN: 02714310     EISSN: None     Source Type: Journal    
DOI: 10.1109/ISCAS.2000.857020     Document Type: Article

References (18)

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