Real-time in-memory checkpointing for future hybrid memory systems

Proceedings of the International Conference on Supercomputing

Volumn 2015-June, Issue , 2015, Pages 263-272

  Gao, Shen ^a,b   He, Bingsheng ^a   Xu, Jianliang ^b  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

^b HONG KONG BAPTIST UNIVERSITY   (Hong Kong)

Author keywords

Checkpointing; NVRAM; Parallel computing; Phase change memory

Indexed keywords

COST REDUCTION; INTELLIGENT CONTROL; INTERFERENCE SUPPRESSION; MAINTENANCE; NETWORK MANAGEMENT; PARALLEL PROCESSING SYSTEMS; PHASE CHANGE MEMORY; RANDOM ACCESS STORAGE; REAL TIME SYSTEMS;

APPLICATION EXECUTION; CHECK POINTING; LARGE-SCALE PARALLEL PROCESSING; LOAD-BALANCING MECHANISMS; NON-VOLATILE RANDOM-ACCESS MEMORY; NVRAM; PERFORMANCE BOTTLENECKS; PERFORMANCE ISSUES;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 84957574666     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2751205.2751212     Document Type: Conference Paper

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