Brain-inspired architectures for nanoelectronics

CHIPS 2020 VOL. 2: New Vistas in Nanoelectronics

Volumn , Issue , 2015, Pages 249-274

  Rueckert, Ulrich ^a  

^a BIELEFELD UNIVERSITY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

BRAIN; CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; FAULT TOLERANT COMPUTER SYSTEMS; INTEGRATED CIRCUIT DESIGN; LOW POWER ELECTRONICS; NANOELECTRONICS; SOFTWARE TESTING; SUBSTRATES; SYSTEM-ON-CHIP;

COMPUTATIONAL PARADIGM; DEEP-SUBMICRON CMOS TECHNOLOGY; ELECTRONIC SUBSTRATES; INFORMATION PROCESSING SYSTEMS; INNOVATIVE SYSTEMS; MASSIVE PARALLELISM; NANOELECTRONIC SYSTEMS; PROGRAMMABLE LOGIC;

BRAIN MAPPING;

EID: 84955738755     PISSN: None     EISSN: None     Source Type: Book    
DOI: 10.1007/978-3-319-22093-2_18     Document Type: Chapter

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