Studying the impact of gate tunneling on dynamic behaviors of partially-depleted SOI CMOS using BSIMPD

Proceedings - International Symposium on Quality Electronic Design, ISQED

Volumn 2002-January, Issue , 2002, Pages 487-491

  Su, Pin ^a   Fung, S K H ^a   Liu, Weidong ^a   Hu, Chenming ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Bridge circuits; Circuit simulation; Computational modeling; Delay; History; Hysteresis; Inverters; Semiconductor device modeling; SPICE; Tunneling

Indexed keywords

BRIDGE CIRCUITS; CIRCUIT SIMULATION; DELAY CIRCUITS; DESIGN; ELECTRIC INVERTERS; ELECTRIC NETWORK ANALYSIS; ELECTRON TUNNELING; HISTORY; HYSTERESIS; INTEGRATED CIRCUIT DESIGN; INTEGRATED CIRCUIT MANUFACTURE; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DEVICES; TABLE LOOKUP;

COMPUTATIONAL MODEL; DELAY; HISTORY DEPENDENCE; INVESTIGATE AND ANALYZE; PARTIALLY DEPLETED SOI; PARTIALLY DEPLETED SOI CMOS; PERFORMANCE BENEFITS; TUNNELING MECHANISM;

SPICE;

EID: 84948456795     PISSN: 19483287     EISSN: 19483295     Source Type: Conference Proceeding    
DOI: 10.1109/ISQED.2002.996792     Document Type: Conference Paper

References (20)

1. G. Shahidi et al., Tech. Digest ISSCC, p. 426, 1999.
2. I. Yang et al., Tech. Digest IEDM, pp. 431-434, 1999.
3. C. Chuang et al., Proc. IEEE, vol. 86, p. 689, 1998.
4. th Int. Conf. on Microelectronics, p. 201, 2000.
5. K. Shepard et al., IEEE Trans. on CAD of Integrated Circuits and Systems, vol. 20, no. 7, p. 888, July 2001.
6. nd International Symposium on Quality Electronic Design, pp. 105-110, 2001.
7. C. Hu, Tech. Digest IEDM, pp. 319-322, 1996.
8. W. Lee et al., Symposium on VLSI Tech, pp.198-199, 2000.
9. A. Shanware et al., Tech. Digest IEDM, pp. 815-818, 1999.
10. P. Su et al., Tech. Digest CICC, pp. 197-200, 2000.
11. www-device.eecs.berkeley.edu/~bsimsoi
12. P. Su et al., Int. SOI Conf., pp. 50-51, 1999.
13. S. Fung et al., Symposium on VLSI Tech, pp. 206-207, 2000.
14. H. Nakayama et al., Tech. Digest CICC, pp. 381-384, 2001.
15. K. Goto et al., Int. SOI Conf., pp. 55-56, 2001.
16. A. Wei et al., IEEE EDL, vol. 16, p. 494, Nov. 1995.
17. J. Gautier et al., IEEE EDL, vol. 16, p. 497, Nov. 1995.
18. A. Wei et al., Tech. Digest IEDM, pp. 411-414, 1997.
19. P. Su et al., Int. SOI Conf., pp 31-32, 2001.
20. S. Fung et al., Tech. Digest IEDM, pp. 231-234, 2000.