A 40 nm CMOS E-Band Transmitter With Compact and Symmetrical Layout Floor-Plans

IEEE Journal of Solid-State Circuits

Volumn 50, Issue 11, 2015, Pages 2560-2571

  Zhao, Dixian ^a   Reynaert, Patrick ^b  

^a SOUTHEAST UNIVERSITY   (China)

^b UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

Calibration; Capacitance; Integrated circuit interconnections; Layout; Modulation; Resistors; Transmitters

Indexed keywords

BUILDINGS; CALIBRATION; FLOORS; INTEGRATED CIRCUIT DESIGN; INTEGRATED CIRCUIT LAYOUT; TRANSCEIVERS; TRANSMITTERS;

CALIBRATION CIRCUITS; CALIBRATION METHOD; MILLIMETER-WAVE (MM-WAVE); PERFORMANCE METRICS; POLY PHASE FILTERS; PROCESS VARIATION; SYSTEMATIC DESIGN METHODOLOGIES; TRANSMITTERS (TX);

MILLIMETER WAVES;

EID: 84947046410     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2015.2456918     Document Type: Article

References (30)

1. FCC 05-45, Allocations and Service Rules for the 71-76 GHz, 81-86 GHz and 92-95 GHz Bands, 2005.
2. ECC Recommendation (05) 07, Radio Frequency Channel Arrangements for Fixed Service Systems Operating in the Bands 71-76 GHz and 81-86 GHz,. Dublin, Lugano, 2009, 2013.
3. J. Wells, Multigigabit Microwave and Millimeter-Wave Wireless Communications. Boston, MA, USA: Artech House, 2010.
4. D. Zhao and P. Reynaert, "A 0.9 V 20.9 dBm 22.3%-PAE E-band power amplifier with broadband parallel-series power combiner in 40 nm CMOS," in IEEE ISSCC Dig. Tech. Papers, 2014, pp. 248-249.
5. D. Zhao and P. Reynaert, "An E-band power amplifier with broadband parallel-series power combiner in 40-nm CMOS," IEEE Trans. Microw. Theory Techn., vol. 63, no. 2, pp. 683-690, Feb. 2015.
6. G. Brenna et al., "A 2 GHz carrier leakage calibrated direct-conversion WCDMA transmitter in 0.13 μm CMOS," IEEE J. Solid-State Circuits, vol. 39, no. 8, pp. 1253-1262, Aug. 2004.
7. H. Darabi, "System requirements of RF transceivers," in ISSCC Short Courses, 2011.
8. P. R. Gray et al., Analysis and Design of Analog Integrated Circuits, 4th ed. New York, NY, USA: Wiley, 2001.
9. B. Razavi, "Design of millimeter-wave CMOS radios: A tutorial," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 56, no. 1, pp. 4-16, Jan. 2009.
10. K. Okada et al., "Full four-channel 6.3 Gb/s 60-GHz CMOS transceiver with low-power analog and digital baseband circuitry," IEEE J. Solid-State Circuits, vol. 48, no. 1, pp. 46-65, Jan. 2013.
11. P.-Y. Wu, A. K. Gupta, and J. F. Buckwalter, "A dual-band millimeter-wave direct-conversion transmitter with quadrature error correction," IEEE Trans. Microw. Theory Techn., vol. 62, no. 11, pp. 3118-3130, Dec. 2014.
12. E. Lopelli et al., "A 40 nm wideband direct-conversion transmitter with sub-sampling-based output power, LO feedthrough and I/Q imbalance calibration," in IEEE ISSCC Dig. Tech. Papers, 2011, pp. 424-425.
13. D. Zhao and P. Reynaert, "A 3 Gb/s 64-QAM E-band direct-conversion transmitter in 40-nm CMOS," in Proc. A-SSCC, Nov. 2014, pp. 177-180.
14. M. Vigilante and P. Reynaert, "An E-band low-noise transformer-coupled quadrature VCO in 40 nm CMOS," in Proc. ESSCIRC, 2014, pp. 423-426.
15. N. Deferm and P. Reynaert, "A 120 GHz 10 Gb/s phase-modulating transmitter in 65 nm LP CMOS," in IEEE ISSCC Dig. Tech. Papers, 2011, pp. 290-291.
16. F. Behbahani, Y. Kishigami, J. Leete, and A. A. Abidi, "CMOS mixers and polyphase filters for large image rejection," IEEE J. Solid-State Circuits, vol. 36, no. 6, pp. 873-887, Jun. 2001.
17. W. L. Chan and J. R. Long, "A 60-GHz band 2 x 2 phased-array transmitter in 65-nm CMOS," IEEE J. Solid-State Circuits, vol. 45, no. 12, pp. 2682-2695, Dec. 2010.
18. A. Parsa and B. Razavi, "A new transceiver architecture for the 60-GHz band," IEEE J. Solid-State Circuits, vol. 44, no. 3, pp. 751-762, Mar. 2009.
19. D. Zhao, S. Kulkarni, and P. Reynaert, "A 60-GHz outphasing transmitter in 40-nm CMOS," IEEE J. Solid-State Circuits, vol. 47, no. 12, pp. 3172-3183, Dec. 2012.
20. S. Kulkarni, D. Zhao, and P. Reynaert, "Design of an optimal layout polyphase filter for millimeter-wave quadrature LO generation," IEEE Trans. Circuits Syst. II, vol. 60, no. 4, pp. 202-206, Apr. 2013.
21. B. Razavi, RF Microelectronics, 2nd ed. Englewood Cliffs, NJ, USA: Prentice-Hall, 2011.
22. V. H. Le, Q. K. Tran, S. K. Han, and S. G. Lee, "Characterization of LO leakage behavior in transconductance mixers," in IEEE Conf. Electron Devices and Solid-State Circuits, 2005, pp. 461-464.
23. M. A. Karim, S. Venugopalan, Y. S. Chauhan, D. Lu, A. Niknejad, and C. Hu, "Drain induced barrier lowering (DIBL) effect on the intrinsic capacitances of nano-scale MOSFETs," in Proc. NSTI-Nanotech, 2011, pp. 814-817.
24. X. Wu, P. Palmers, and M. S. J. Steyaert, "A 130 nm CMOS 6-bit full Nyquist 3 GS/s DAC," IEEE J. Solid-State Circuits, vol. 43, no. 11, pp. 2396-2403, Nov. 2008.
25. D. Zhao and P. Reynaert, "A 60-GHz dual-mode class AB power amplifier in 40-nm CMOS," IEEE J. Solid-State Circuits, vol. 48, no. 10, pp. 2323-2337, Oct. 2013.
26. K. Okada et al., "A 64-QAM 60 GHz CMOS transceiver with 4-channel bonding," in IEEE ISSCC Dig. Tech. Papers, 2014, pp. 346-347.
27. V. Vidojkovic et al., "A low-power radio chipset in 40 nm LP CMOS with beamforming for 60 GHz high-data-rate wireless communication," in IEEE ISSCC Dig. Tech. Papers, 2013, pp. 236-237.
28. S. Saigusa et al., "A fully integrated single-chip 60 GHz CMOS transceiver with scalable power consumption for proximity wireless communication," in IEEE ISSCC Dig. Tech. Papers, 2014, pp. 348-349.
29. N. Saito et al., "A fully integrated 60-GHz CMOS transceiver chipset based on WiGig/IEEE 802.11ad with built-in self calibration for mobile usage," IEEE J. Solid-State Circuits, vol. 48, no. 12, pp. 3146-3159, Dec. 2013.
30. W.-H. Lin et al., "1024-QAM high image rejection E-band subharmonic IQ modulator and transmitter in 65-nm CMOS process," IEEE Trans. Microw. Theory Techn., vol. 61, no. 11, pp. 3974-3985, Nov. 2013.