A low-power radio chipset in 40nm LP CMOS with beamforming for 60GHz high-data-rate wireless communication

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 56, Issue , 2013, Pages 236-237

  Vidojkovic, Vojkan ^a   Szortyka, Viki ^a,b   Khalaf, Khaled ^a,b   Mangraviti, Giovanni ^a,b   Brebels, Steven ^a   Thillo, Wim Van ^a   Vaesen, Kristof ^a   Parvais, Bertrand ^a   Issakov, Vadim ^a   Libois, Mike ^a   Matsuo, Michiaki ^c   Long, John ^d   Soens, Charlotte ^a   Wambacq, Piet ^a,b  

^a IMEC   (Belgium)

^b VRIJE UNIVERSITEIT BRUSSEL   (Belgium)

^c Panasonic Tokyo   (Japan)

^d DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS REALIZATION; LINK BUDGETS; NOISE PERFORMANCE; RADIO CHIPSET; RADIO FUNCTIONS; SLIDING-IF; WIRELESS COMMUNICATION SYSTEM; WIRELESS COMMUNICATIONS;

COMMUNICATION SYSTEMS; SIGNAL RECEIVERS; WIRELESS TELECOMMUNICATION SYSTEMS;

BEAMFORMING;

EID: 84876522715     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2013.6487715     Document Type: Conference Paper

References (5)

1. K. Okada et al., "A Full 4-Channel 6.3Gb/s 60GHz Direct-Conversion Transceiver with Low-Power Analog and Digital Baseband Circuitry", ISSCC Dig. Tech. Papers, pp. 218-219, Feb. 2012
2. M. Tabesh et al., "A 65nm CMOS 4-Element Sub-34mW/Element 60GHz Phased-Array Transceiver", ISSCC Dig. Tech. Papers, pp. 166-167, Feb. 2011
3. S. Emami et al., "A 60GHz CMOS Phased-Array Transceiver Pair for Multi-Gb/s Wireless Communications", ISSCC Dig. Tech. Papers, pp. 164-165, Feb. 2011
4. V. Vidojkovic et al., "A Low-Power 57-To-66GHz Transceiver in 40nm LP CMOS With-17dB EVM at 7Gb/s", ISSCC Dig. Tech. Papers, pp. 268-269, Feb. 2012
5. V. Szortyka et al., "A 42mW Wideband Baseband Receiver Section with Beamforming Functionality for 60GHz Applications in 40nm Low-Power CMOS", IEEE Radio Frequency Integrated Circuits Symp., pp. 261-264, June 2012