ESD protection design for giga-Hz RF CMOS LNA with novel impedance-isolation technique

Electrical Overstress/Electrostatic Discharge Symposium Proceedings

Volumn 2003-January, Issue , 2003, Pages

  Ker, Ming Dou ^a   Lee, Chien Ming ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTROSTATIC DEVICES; ELECTROSTATIC DISCHARGE; FREQUENCY BANDS; INTEGRATED CIRCUIT DESIGN; NOISE FIGURE; RADIO FREQUENCY AMPLIFIERS;

ESD PROTECTION; ESD PROTECTION CIRCUIT; ESD PROTECTION DEVICES; ESD ROBUSTNESS; HIGHER FREQUENCIES; ISOLATION TECHNIQUES; ON-CHIP ESD PROTECTION; OPERATION FREQUENCY;

LOW NOISE AMPLIFIERS;

EID: 84945219086     PISSN: 07395159     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (19)

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