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Volumn 1, Issue , 1998, Pages 325-328

Electrostatic discharge protection circuits in CMOS IC's using the lateral SCR devices: An overview

Author keywords

[No Author keywords available]

Indexed keywords

ELECTROSTATIC DISCHARGE; ELECTROSTATICS; ELECTRIC DISCHARGES; THYRISTORS;

EID: 0032273088     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.1998.813332     Document Type: Conference Paper
Times cited : (10)

References (14)
  • 1
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    • 1988 IEDM Technical Digest , pp. 580-583
    • Rountree, R.N.1
  • 4
    • 0025659612 scopus 로고
    • A low-voltage triggering SCR for on-chip ESD protection at output and input pads
    • A. Chatterjee and T. Polgreen, "A low-voltage triggering SCR for on-chip ESD protection at output and input pads", Proc. Symp. On VLSI Technology, 1990, pp. 75-76..
    • (1990) Proc. Symp. on VLSI Technology , pp. 75-76
    • Chatterjee, A.1    Polgreen, T.2
  • 5
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    • A low-voltage triggering SCR for on-chip ESD protection at output and input pads
    • Jan.
    • A. Chatterjee and T. Polgreen, "A low-voltage triggering SCR for on-chip ESD protection at output and input pads", IEEE Electron Device Letters, vol. 12, pp. 21-22, Jan. 1991.
    • (1991) IEEE Electron Device Letters , vol.12 , pp. 21-22
    • Chatterjee, A.1    Polgreen, T.2
  • 6
    • 0029543507 scopus 로고
    • Area-efficient CMOS output buffer with enhanced high ESD reliability for deep submicron CMOS ASIC
    • M.-D. Ker, et ai, "Area-efficient CMOS output buffer with enhanced high ESD reliability for deep submicron CMOS ASIC", Proc. of IEEE International ASIC Conference and Exhibit, 1995, pp. 123-126.
    • (1995) Proc. of IEEE International ASIC Conference and Exhibit , pp. 123-126
    • Ker, M.-D.1
  • 7
    • 0030128946 scopus 로고    scopus 로고
    • Complementary-LVTSCR ESD protection circuit for submicron CMOS VLSI/ULSI
    • M.-D. Ker, et al, "Complementary-LVTSCR ESD protection circuit for submicron CMOS VLSI/ULSI", IEEE Trans. Electron Devices, pp. 588-598, 1996.
    • (1996) IEEE Trans. Electron Devices , pp. 588-598
    • Ker, M.-D.1
  • 8
    • 0030836964 scopus 로고    scopus 로고
    • A gate-coupled PTLSCR/NTLSCR ESD protection circuit for deep-submicron low-voltage CMOS IC's
    • Jan.
    • M.-D. Ker, H.-H. Chang, and C.-Y. Wu, "A gate-coupled PTLSCR/NTLSCR ESD protection circuit for deep-submicron low-voltage CMOS IC's", IEEE Journal of Solid-State Circuits, vol. 32, pp. 38-51, Jan., 1997.
    • (1997) IEEE Journal of Solid-state Circuits , vol.32 , pp. 38-51
    • Ker, M.-D.1    Chang, H.-H.2    Wu, C.-Y.3
  • 9
    • 0028732945 scopus 로고
    • Bi-modal triggering for LVSCR ESD protection devices
    • C. Diaz and G. Moteley, "Bi-modal triggering for LVSCR ESD protection devices", 1994 EOS/ESD Symp. Proc, EOS-16, pp. 106-112.
    • (1994) EOS/ESD Symp. Proc, EOS-16 , pp. 106-112
    • Diaz, C.1    Moteley, G.2
  • 11
    • 0028734433 scopus 로고
    • ESD protection using a variable voltage supply clamp
    • G. D. Croft, "ESD protection using a variable voltage supply clamp", Proc EOS/ESD Symp., 1994, pp. 135-140.
    • (1994) Proc EOS/ESD Symp. , pp. 135-140
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  • 12
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    • A hot-carrier triggered SCR for smart power bus ESD protection
    • J. T. Watt and A. J. Walker, "A hot-carrier triggered SCR for smart power bus ESD protection", Tech. Digest of IEDM, 1995, pp. 341-344.
    • (1995) Tech. Digest of IEDM , pp. 341-344
    • Watt, J.T.1    Walker, A.J.2
  • 13
    • 0030689966 scopus 로고    scopus 로고
    • ESD protection for CMOS ASIC in noisy environments with high-current low-voltage triggering SCR device
    • M.-D. Ker, "ESD protection for CMOS ASIC in noisy environments with high-current low-voltage triggering SCR device", Proc. of IEEE International ASIC Conference & Exhibits, pp. 283-286, 1997.
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    • Ker, M.-D.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.