Impact of deep-trench-isolation-sharing techniques on ultrahigh-speed digital systems

IEEE Transactions on Circuits and Systems II: Express Briefs

Volumn 56, Issue 10, 2009, Pages 778-782

  Zhou, Kuan ^a   McDonald, John F ^b  

^a UNIVERSITY OF NEW HAMPSHIRE   (United States)

^b RENSSELAER POLYTECHNIC INSTITUTE   (United States)

Author keywords

Deep trench isolation sharing (DTIS); Hetero junction bipolar transistor (HBT); Silicon germanium (SiGe); Ultrahigh speed digital systems

Indexed keywords

BICMOS TECHNOLOGY; BISMUTH ALLOYS; HETEROJUNCTION BIPOLAR TRANSISTORS; HETEROJUNCTIONS; INTEGRATED CIRCUIT INTERCONNECTS; LARGE SCALE SYSTEMS; LOGIC DEVICES; METALS; MOS DEVICES; OXIDE SEMICONDUCTORS; SEMICONDUCTING GERMANIUM; SPEED; TRANSISTORS;

BIPOLAR COMPLEMENTARY METAL OXIDE SEMICONDUCTOR; CONFIGURABLE LOGIC BLOCKS; DEEP TRENCH ISOLATION; DIGITAL SYSTEM; HETEROJUNCTION BIPOLAR TRANSISTOR (HBTS); LAYOUT IMPLEMENTATIONS; POST LAYOUT SIMULATION; SILICON GERMANIUM;

SI-GE ALLOYS;

EID: 84915754097     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2009.2030535     Document Type: Article

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