Advances in SiGe ICs for 40Gb/s signal equalization

2006 Optical Fiber Communication Conference, and the 2006 National Fiber Optic Engineers Conference

Volumn 2006, Issue , 2006, Pages

  Hong, Jiang ^a   Saunders, Ross ^a  

^a StrataLight Communications   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONICS PACKAGING; EQUALIZERS;

DESIGN METHODOLOGY; EQUALIZER STRUCTURES;

INTEGRATED CIRCUIT LAYOUT;

EID: 33845359855     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. P. P. Monteiro et al., "40Gb/s GaAs MMIC signal processor for optical communication systems", GaAs Applications Symp., Sept. 2001.
2. M. Nakamura et al., "Electrical PMD equalizer ICs for a 40Gb/s transmission", OFC 2004, TuG4.
3. A. Hazneci et al., "A 49Gb/s, 7-tap transversal filter in 0.18um SiGe BiCMOS for backplane equalization", IEEE CSIC Symp., Monterey, CA, Technical Digest, pp.101-104, Oct. 2004.
4. R. Saunders et al., "SiGe equalizer IC for PMD mitigation and signal optimization of 40Gb/s transmission", OFC 2005, OWO2.
5. A. Garg et al., "A 1-tap 40Gb/s lookahead decision feedback equalizer in 0.18um SiGe BiCMOS technology", accepted at IEEE CSIC Symp., Palm Springs, CA, Nov. 2005.
6. J. Sewter, "Electrical equalization of PMD in 40Gb/s optical systems", MSEE Thesis, Dept. ECE, Univ. of Toronto, 2005.
7. H. Bulow et al., "Electronic PMD mitigation - from linear equalization to maximum-likelihood detection", OFC 2001, WAA3.
8. nd Ed., 1994, ISBN 0-7923-9391-0.