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Volumn , Issue , 2014, Pages

Correlation of BTI induced device parameter degradation and variation in scaled metal gate/High-k CMOS technologies

Author keywords

BTI variability; CMOS; high k dielectrics; metal gate; SRAM

Indexed keywords

CMOS INTEGRATED CIRCUITS; GATE DIELECTRICS; STATIC RANDOM ACCESS STORAGE;

EID: 84905649489     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IRPS.2014.6861102     Document Type: Conference Paper
Times cited : (11)

References (10)
  • 1
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    • Review and reexamination of reliability effects related to NBTI-Induced statistical variations
    • Stewart E. Rauch III, "Review and Reexamination of Reliability Effects Related to NBTI-Induced Statistical Variations", IEEE Trans. Device Mater. Rel, Vol. 7, No. 4, pg. 524-530, 2007.
    • (2007) IEEE Trans. Device Mater. Rel , vol.7 , Issue.4 , pp. 524-530
    • Rauch III, S.E.1
  • 4
    • 56549113808 scopus 로고    scopus 로고
    • Characterization of fast relaxation during BTI stress in conventional and advanced CMOS devices with HfO2/TiN gate stacks
    • A. Kerber, K. Maitra, A. Majumdar, M. Hargrove, R. J. Carter, and E. Cartier, "Characterization of fast relaxation during BTI stress in conventional and advanced CMOS devices with HfO2/TiN gate stacks", IEEE Trans. Electron Devices, vol. 55, no. 11, pp. 3175-3183, 2008.
    • (2008) IEEE Trans. Electron Devices , vol.55 , Issue.11 , pp. 3175-3183
    • Kerber, A.1    Maitra, K.2    Majumdar, A.3    Hargrove, M.4    Carter, R.J.5    Cartier, E.6
  • 5
    • 77956173971 scopus 로고    scopus 로고
    • A fast Four-Point sense methodology for extraction of circuit-Relevant degradation parameters
    • A. Kerber and E. Cartier, "A Fast Four-Point Sense Methodology for Extraction of Circuit-Relevant Degradation Parameters", IEEE Electron Device Letters, Vol. 31, No. 9, pp. 912-914, 2010.
    • (2010) IEEE Electron Device Letters , vol.31 , Issue.9 , pp. 912-914
    • Kerber, A.1    Cartier, E.2
  • 7
    • 0842288263 scopus 로고    scopus 로고
    • BTI impact on transistor & circuit: Models, mechanisms & scaling effects
    • A.T. Krishnan, V. Reddy, S. Chakravarthi, et al., " BTI Impact on Transistor & Circuit: Models, Mechanisms & Scaling Effects" , in IEDM Tech. Digest, p. 349-352, 2003.
    • (2003) IEDM Tech. Digest , pp. 349-352
    • Krishnan, A.T.1    Reddy, V.2    Chakravarthi, S.3
  • 8
    • 84880975018 scopus 로고    scopus 로고
    • Challenges in the characterization and modeling of BTI induced variability in Metal Gate/High-k CMOS technologies
    • A. Kerber and T. Nigam, "Challenges in the characterization and modeling of BTI induced variability in Metal Gate/High-k CMOS technologies", Proc. Int. Rel. Phys. Symp., pg. 2D.4.1, 2013.
    • (2013) Proc. Int. Rel. Phys. Symp.
    • Kerber, A.1    Nigam, T.2
  • 9
    • 84897913730 scopus 로고    scopus 로고
    • Impact of stress mode on stochastic BTI in scaled MG/HK CMOS devices
    • A. Kerber and P. Srinivasan, "Impact of stress mode on stochastic BTI in scaled MG/HK CMOS devices", IEEE Electron Device Letters, Vol. 35, No. 4, pp. 431-433, 2014.
    • (2014) IEEE Electron Device Letters , vol.35 , Issue.4 , pp. 431-433
    • Kerber, A.1    Srinivasan, P.2
  • 10
    • 84895917964 scopus 로고    scopus 로고
    • Methodology for determination of process induced BTI variability in MG/HK CMOS technologies using a novel matrix test structure
    • A. Kerber, "Methodology for Determination of Process Induced BTI Variability in MG/HK CMOS Technologies Using a Novel Matrix Test Structure", IEEE Electron Device Letters, Vol. 35, No. 3, pp. 294-296, 2014.
    • (2014) IEEE Electron Device Letters , vol.35 , Issue.3 , pp. 294-296
    • Kerber, A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.