Methodology for determination of process induced BTI variability in MG/HK CMOS technologies using a novel matrix test structure

IEEE Electron Device Letters

Volumn 35, Issue 3, 2014, Pages 294-296

  Kerber, Andreas ^a  

^a IBM MICROELECTRONICS   (United States)

Author keywords

Bias temperature instability (BTI); CMOS devices; high k dielectrics; metal gate; process variability; stochastic variability

Indexed keywords

CMOS INTEGRATED CIRCUITS; GATE DIELECTRICS; RANDOM PROCESSES; STOCHASTIC SYSTEMS;

BIAS TEMPERATURE INSTABILITY; CMOS DEVICES; METAL GATE; PROCESS VARIABILITY; STOCHASTIC VARIABILITY;

INTEGRATED CIRCUITS;

EID: 84895917964     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2014.2298096     Document Type: Article

References (12)

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