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Volumn , Issue , 2014, Pages 260-271

Improving GPGPU resource utilization through alternative thread block scheduling

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; PROGRAM PROCESSORS; SUPERCOMPUTERS; WEAVING;

EID: 84903951085     PISSN: 15300897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPCA.2014.6835937     Document Type: Conference Paper
Times cited : (156)

References (31)
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    • Che, S.1
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    • Memory latency reduction via thread throttling
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    • Cheng, H.-Y.1
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    • Dynamic warp formation and scheduling for efficient gpu control flow
    • Chicago, Illinois, USA
    • W. W. L. Fung et al. Dynamic Warp Formation and Scheduling for Efficient GPU Control Flow. In International Symposium on Microarchitecture (MICRO), pages 407-420, Chicago, Illinois, USA, 2007.
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    • Fung, W.W.L.1
  • 10
    • 53749092570 scopus 로고    scopus 로고
    • Parallel computing experiences with cuda
    • M. Garland et al. Parallel Computing Experiences with CUDA. Micro, IEEE, 28(4), 2008.
    • (2008) Micro, IEEE , vol.28 , Issue.4
    • Garland, M.1
  • 11
    • 80052533471 scopus 로고    scopus 로고
    • Energy-efficient mechanisms for managing thread context in throughput processors
    • San Jose, California, USA
    • M. Gebhart et al. Energy-Efficient Mechanisms for Managing Thread Context in Throughput Processors. In International Symposium on Computer architecture (ISCA), pages 235-246, San Jose, California, USA, 2011.
    • (2011) International Symposium on Computer Architecture (ISCA) , pp. 235-246
    • Gebhart, M.1
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    • GPUWattch: Enabling energy optimizations in gpgpus
    • Tel-Aviv, Israel
    • J. Leng et al. GPUWattch: Enabling Energy Optimizations in GPGPUs. In International Symposium on Computer Architecture (ISCA), pages 487-498, Tel-Aviv, Israel, 2013.
    • (2013) International Symposium on Computer Architecture (ISCA) , pp. 487-498
    • Leng, J.1
  • 20
    • 84863342255 scopus 로고    scopus 로고
    • Improving gpu performance via large warps and two-level warp scheduling
    • Porto Alegre, Brazil
    • V. Narasiman et al. Improving GPU Performance via Large Warps and Two-Level Warp Scheduling. In International Symposium on Microarchitecture (MICRO), pages 308-317, Porto Alegre, Brazil, 2011.
    • (2011) International Symposium on Microarchitecture (MICRO) , pp. 308-317
    • Narasiman, V.1
  • 23
    • 84904009579 scopus 로고    scopus 로고
    • NVIDIA. Fermi: NVIDIA's Next Generation CUDA Compute Architecture
    • NVIDIA. Fermi: NVIDIA's Next Generation CUDA Compute Architecture, 2011.
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    • Parboil: A revised benchmark suite for scientific and commercial throughput computing
    • J. Stratton et al. Parboil: A Revised Benchmark Suite for Scientific and Commercial Throughput Computing. Center for Reliable and High-Performance Computing, 2012.
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    • Stratton, J.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.