Automated partitioning for partial reconfiguration design of adaptive systems

Proceedings - IEEE 27th International Parallel and Distributed Processing Symposium Workshops and PhD Forum, IPDPSW 2013

Volumn , Issue , 2013, Pages 172-181

  Vipin, Kizheppatt ^a   Fahmy, Suhaib A ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

design automation; Field programmable gate arrays; partial reconfiguration

Indexed keywords

ADAPTIVE SYSTEMS; COMPUTER AIDED DESIGN; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTEGRATED CIRCUIT DESIGN;

APPLICATION DESCRIPTIONS; AUTOMATED PARTITIONING; DESIGN ABSTRACTIONS; DESIGN AUTOMATIONS; ENVIRONMENTAL CONDITIONS; PARTIAL RECONFIGURATION; RECONFIGURABLE MODULE; RECONFIGURATION TIME;

RECONFIGURABLE HARDWARE;

EID: 84899757768     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPSW.2013.119     Document Type: Conference Paper

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