Power-performance modeling on asymmetric multi-cores

2013 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2013

Volumn , Issue , 2013, Pages

  Pricopi, Mihai ^a   Muthukaruppan, Thannirmalai Somu ^a   Venkataramani, Vanchinathan ^a   Mitra, Tulika ^a   Vishin, Sanjay ^b  

^a NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

^b Cambridge Silicon Radio ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ARCHITECTURE; ARM PROCESSORS; EMBEDDED SYSTEMS; PROGRAM COMPILERS;

HETEROGENEOUS MEMORY HIERARCHIES; MODELING TECHNIQUE; MULTI-CORE PLATFORMS; MULTI-CORES; MULTICORE ARCHITECTURES; PERFORMANCE CHARACTERISTICS; PERFORMANCE COUNTERS;

COMPUTER ARCHITECTURE;

EID: 84892628674     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CASES.2013.6662519     Document Type: Conference Paper

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