Energy-efficient scheduling on heterogeneous multi-core architectures

Proceedings of the International Symposium on Low Power Electronics and Design

Volumn , Issue , 2012, Pages 345-350

  Cong, Jason ^a   Yuan, Bo ^a  

^a Engineering IV   (United States)

Author keywords

energy efficiency; heterogeneous multi core; scheduling

Indexed keywords

ENERGY DELAY PRODUCT; ENERGY-EFFICIENT SCHEDULING; HETEROGENEOUS MULTICORE; MULTI CORE; MULTICORE ARCHITECTURES; PERIODIC SAMPLING; PROGRAM PHASIS; REGRESSION MODEL; RUN-TIME SCHEDULING; SCHEDULING APPLICATION; SCHEDULING METHODS; SCHEDULING SCHEMES;

ARCHITECTURE; ENERGY EFFICIENCY; ENERGY UTILIZATION; LOW POWER ELECTRONICS; MICROPROCESSOR CHIPS; REGRESSION ANALYSIS; SCHEDULING; STATIC ANALYSIS;

COMPUTER ARCHITECTURE;

EID: 84865559097     PISSN: 15334678     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2333660.2333737     Document Type: Conference Paper

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