Self-aligned In0.53Ga0.47As/InAs/InP vertical tunnel FETs

2011 International Conference on Compound Semiconductor Manufacturing Technology, CS MANTECH 2011

Volumn , Issue , 2011, Pages

  Zhou, Guangle ^a   Lu, Y ^a   Li, R ^a   Hwang, W ^a   Zhang, Q ^a   Liu, Q ^a   Vasen, T ^a   Chen, C ^b   Zhu, H ^c   Kuo, J ^c   Koswatta, S ^d   Kosel, T ^a   Wistey, M ^a   Fay, P ^a   Seabaugh, A ^a   Xing, Huili ^a  

^a University of Notre Dame   (United States)

^b SAINT MARY'S COLLEGE   (United States)

^c IntelliEPI   (United States)

^d IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

Heterojunction; Self aligned; Subthreshold slope; Tunnel FET; Vertical FET

Indexed keywords

BAND TO BAND TUNNELING; NEGATIVE DIFFERENTIAL RESISTANCES; SELF ALIGNED PROCESS; SELF-ALIGNED; SUB-THRESHOLD SWING(SS); SUBTHRESHOLD SLOPE; TUNNEL FET; VERTICAL FET;

GALLIUM; HETEROJUNCTIONS; SEMICONDUCTOR DEVICE MANUFACTURE;

FIELD EFFECT TRANSISTORS;

EID: 84887369336     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

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