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Volumn 48, Issue 12, 1999, Pages 1338-1354

Run-time cache bypassing

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER SYSTEMS PROGRAMMING; PROGRAM COMPILERS; RESPONSE TIME (COMPUTER SYSTEMS);

EID: 0033319665     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.817393     Document Type: Article
Times cited : (85)

References (36)
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    • W.Y. Chen, S.A. Mahlke, P.P. Chang, and W.W. Hwu, "Data Access Microarchitectures for Superscalar Processors with Compiler-Assisted Data Prefetching," Proc. 24th Ann. Int'l Symp. Microarchitecture, pp. 69-73, Nov. 1991.
    • (1991) Proc. 24th Ann. Int'l Symp. Microarchitecture , pp. 69-73
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    • A Data Cache with Multiple Caching Strategies Tuned to Different Types of Locality
    • July
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    • Rivers, J.A.1    Davidson, E.S.2
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.