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Volumn 44, Issue 4, 2013, Pages 332-338

Single-electron shift-register circuit

Author keywords

Logic gate; Room temperature; Shift register; Single electron tunneling; Stability

Indexed keywords

D FLIP-FLOPS; NAND GATE; NOISE MARGINS; ROOM TEMPERATURE; SINGLE ELECTRON; SINGLE ELECTRON TUNNELING; SINGLE-ELECTRON TUNNELING DEVICES; STABILITY ANALYSIS;

EID: 84875228634     PISSN: 00262692     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mejo.2013.02.012     Document Type: Article
Times cited : (7)

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    • Single-electron tunnel junction array: An electrostatic analog of the Josephson transmission line
    • K.K. Likharev, N.S. Bakhvalov, G.S. Kazacha, and S.I. Serdyukova Single-electron tunnel junction array: an electrostatic analog of the Josephson transmission line IEEE Trans. Magn. 25 1989 1436
    • (1989) IEEE Trans. Magn. , vol.25 , pp. 1436
    • Likharev, K.K.1    Bakhvalov, N.S.2    Kazacha, G.S.3    Serdyukova, S.I.4
  • 13
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    • 10944229100 scopus 로고    scopus 로고
    • Design and simulation of a nanoelectronic single-electron universal Fredkin gate
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    • Zardalidis, G.T.1    Karafyllidis, I.2
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  • 22
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    • Design and simulation of novel TLG-SET based configurable logic cells
    • M.M. Abutaleb Design and simulation of novel TLG-SET based configurable logic cells Microelectron. J. 43 2012 537
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.