-
1
-
-
79951587336
-
Design for board and system level structural test and diagnosis
-
T. Vo et al., "Design for board and system level structural test and diagnosis, " in Proc. ITC, 2006.
-
(2006)
Proc. ITC
-
-
Vo, T.1
-
2
-
-
39749105320
-
Test economics-what can a board/system test engineer do to influence supply operation metrics
-
S. Tourangeau and B. Eklow, "Test economics-what can a board/system test engineer do to influence supply operation metrics, " in Proc. ITC, 2006.
-
(2006)
Proc. ITC
-
-
Tourangeau, S.1
Eklow, B.2
-
3
-
-
39749198552
-
A practical approach to comprehensive system test & debug using boundary scan based test architecture
-
T. Chakraborty, C.-H. Chiang, and B. Van Treuren, "A practical approach to comprehensive system test & debug using boundary scan based test architecture, " in Proc. ITC, 2007.
-
(2007)
Proc. ITC
-
-
Chakraborty, T.1
Chiang, C.-H.2
Van Treuren, B.3
-
4
-
-
33847162467
-
A practical perspective on reducing ASIC NTFs
-
Z. Conroy et al., "A practical perspective on reducing ASIC NTFs, " in Proc. ITC, pp. 340-349, 2005.
-
(2005)
Proc. ITC
, pp. 340-349
-
-
Conroy, Z.1
-
5
-
-
0035435324
-
Fault diagnosis of electronic systems using intelligent techniques: A review
-
W. Fenton, T. McGinnity, and L. Maguire, "Fault diagnosis of electronic systems using intelligent techniques: a review, " IEEE Trans. on Sys., Man., and Cyber., Part C, vol. 31, pp. 269-281, 2001.
-
(2001)
IEEE Trans. on Sys., Man., and Cyber., Part C
, vol.31
, pp. 269-281
-
-
Fenton, W.1
McGinnity, T.2
Maguire, L.3
-
6
-
-
33847092422
-
The effects of defects on high-speed boards
-
K. Parker, "The effects of defects on high-speed boards, " in Proc. ITC, pp. 178-187, 2005.
-
(2005)
Proc. ITC
, pp. 178-187
-
-
Parker, K.1
-
7
-
-
18144390639
-
At-speed interconnect test and diagnosis of external memories on a system
-
H. Kim et al., "At-speed interconnect test and diagnosis of external memories on a system, " in Proc. ITC, pp. 156-162, 2004.
-
(2004)
Proc. ITC
, pp. 156-162
-
-
Kim, H.1
-
8
-
-
84866614468
-
Diagnosis of board-level functional failures under uncertainty using Dempster-Shafer theory
-
H. Fang et al., "Diagnosis of board-level functional failures under uncertainty using Dempster-Shafer theory, " in IEEE Trans. CAD, vol. 31, pp. 817-830, 2012.
-
(2012)
IEEE Trans. CAD
, vol.31
, pp. 817-830
-
-
Fang, H.1
-
9
-
-
0000555770
-
Model-based diagnosis using structured system descriptions
-
A. Darwiche, "Model-based diagnosis using structured system descriptions, " JAIR, vol. 8, pp. 165-222, 1998.
-
(1998)
JAIR
, vol.8
, pp. 165-222
-
-
Darwiche, A.1
-
10
-
-
0033165427
-
Model-based diagnosis of hardware designs
-
G. Friedrich, M. Stumptner, and F. Wotawa, "Model-based diagnosis of hardware designs, " JAIR, vol. 111, pp. 3-39, 1999.
-
(1999)
JAIR
, vol.111
, pp. 3-39
-
-
Friedrich, G.1
Stumptner, M.2
Wotawa, F.3
-
11
-
-
80052005159
-
Board-level fault diagnosis using Bayesian inference
-
Z. Zhang et al., "Board-level fault diagnosis using Bayesian inference, " in Proc. VTS, 2010.
-
(2010)
Proc. VTS
-
-
Zhang, Z.1
-
12
-
-
84863151354
-
Smart diagnosis: Efficient board-level diagnosis and repair using artificial neural networks
-
Z. Zhang et al., "Smart diagnosis: Efficient board-level diagnosis and repair using artificial neural networks, " in Proc. ITC, 2011.
-
(2011)
Proc. ITC
-
-
Zhang, Z.1
-
13
-
-
84872518374
-
Diagnostic system based on support-vector machines for board-level functional diagnosis
-
Z. Zhang et al., "Diagnostic system based on support-vector machines for board-level functional diagnosis, " in Proc. ETS, pp. 170-175, 2012.
-
(2012)
Proc. ETS
, pp. 170-175
-
-
Zhang, Z.1
-
14
-
-
67249142270
-
Defect coverage of boundary-scan tests: What does it mean when a boundary-scan test passes?
-
K. Parker, "Defect coverage of boundary-scan tests: what does it mean when a boundary-scan test passes?, " in Proc. ITC, pp. 181-189, 2003.
-
(2003)
Proc. ITC
, pp. 181-189
-
-
Parker, K.1
-
16
-
-
0006472145
-
Support vector machines for multi-class pattern recognition
-
J. Weston and C. Watkins, "Support vector machines for multi-class pattern recognition, " in Proc. ESANN, vol. 4, pp. 219-224, 1999.
-
(1999)
Proc. ESANN
, vol.4
, pp. 219-224
-
-
Weston, J.1
Watkins, C.2
-
17
-
-
78149308001
-
Incremental support vector machine construction
-
C. Domeniconi and D. Gunopulos, "Incremental support vector machine construction, " in Proc. ICDM, pp. 589-592, 2001.
-
(2001)
Proc. ICDM
, pp. 589-592
-
-
Domeniconi, C.1
Gunopulos, D.2
|