A comparative analysis of tunneling FET circuit switching characteristics and SRAM stability and performance

European Solid-State Device Research Conference

Volumn , Issue , 2012, Pages 157-160

  Chen, Yin Nien ^a   Fan, Ming Long ^a   Hu, Pi Ho ^a   Tsai, Ming Fu ^a   Pao, Chia Hao ^a   Su, Pin ^a   Chuang, Ching Te ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT SWITCHING; COMPARATIVE ANALYSIS; CROSS-OVER; CROSSOVER REGIONS; LOW-LEAKAGE CURRENT; MIXED MODE SIMULATION; MOSFETS; READ CURRENT; SOFT-TRANSITION; SOURCE-DRAIN; SRAM CELL; SRAM STABILITY; STATIC NOISE MARGIN; STEEP SLOPE; STORAGE NODES; SUBTHRESHOLD; TUNNELING FET; ULTRALOW VOLTAGE;

SILICON ON INSULATOR TECHNOLOGY;

STATIC RANDOM ACCESS STORAGE;

EID: 84870607488     PISSN: 19308876     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDERC.2012.6343357     Document Type: Conference Paper

References (18)

1. K. K. Bhuwalka et al. , IEEE Trans. Electron Devices, vol. 51, no. 2, pp. 279-282, Feb. 2004.
2. C. Aydin et al. , Appl. Phys. Lett. , vol. 83, no. 8, pp. 1653-1655, Aug. 2003.
3. Q. Zhang et al. , IEEE Electron Device Lett. , vol. 27, no. 4, pp. 297-300, 2006.
4. K. Boucart et al. , IEEE Trans. Electron Devices, vol. 54, no. 7, pp. 1725-1733, Jul. 2007.
5. A. Tura et al. , Trans. Electron Devices, vol. 57, no. 6, pp. 1362-1368,. 2010.
6. F. Mayer et al. , IEDM. Tech. Dig. 163, 2008.
7. R. Gandhi et al. , Electron Device Lett. , vol. 32, no. 4, pp. 437-439, 2011.
8. A. C. Ford et al. , Applied Physics Letters, vol. 98, no. 11, pp. 113105, 2011.
9. S. H. Kim et al. , VLSI Symp. Tech. Dig. , 2009, pp. 178-179.
10. D. Kim et al. , Symp. Low Power Electronics and Design, pp. 219-224, 2009.
11. J. Singh et al. , Proc. ASP-DAC, pp. 181-186, 2010.
12. X. Yang et al. , Proc. Design Automation and Test in Europe, pp. 1-6, 2011.
13. V. Saripalli et al. , Symp. Nanoscale Architectures, pp. 45-52, 2011.
14. Sentaurus User's Manual, 2011.
15. L. Chang, et al. , Symp. VLSI Tech. Dig. , pp. 128-129, 2005.
16. M. Yamaoka, et al. , ISSCC Digest of Tech. Papers, pp. 480-481, Feb. 2005.
17. B. Giraud et al. , Proc. Int. Conf. Circuits Syst. , pp. 3022-3025, 2007.
18. M.-L. Fan et al. , Trans. Electron Devices, vol. 58, no. 3, pp. 609-616, 2011.