Effect of the post-deposition annealing on electrical characteristics of MIS structures with HfO2/SiO2 gate dielectric stacks

Materials Science and Engineering: B

Volumn 177, Issue 15, 2012, Pages 1281-1285

  Taube, Andrzej ^a,b   Mroczyński, Robert ^b   Korwin Mikke, Katarzyna ^a   Gierałtowska, Sylwia ^c   Szmidt, Jan ^b   Piotrowska, Anna ^a  

^a ukasiewicz Research Network Institute of Microelectronics and Photonics   (Poland)

^b WARSAW UNIVERSITY OF TECHNOLOGY   (Poland)

^c INSTITUTE OF PHYSICS   (Poland)

Author keywords

ALD; Electrical characterization; MOS

Indexed keywords

ANNEALING; ELECTRIC FIELDS; GATE DIELECTRICS; HAFNIUM OXIDES; LOW-K DIELECTRIC; METAL INSULATOR BOUNDARIES; MIS DEVICES;

ALD; DOUBLE-GATE; ELECTRICAL CHARACTERISTIC; ELECTRICAL CHARACTERIZATION; GATE DIELECTRIC STACKS; INTERFACE TRAP DENSITY; INTERFACE-TRAP DENSITY; METAL-INSULATOR-SEMICONDUCTOR STRUCTURES; MOS; POST DEPOSITION ANNEALING;

SILICA;

EID: 84865999884     PISSN: 09215107     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mseb.2011.12.010     Document Type: Article

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