Air-spacer mosfet with self-aligned contact for future dense memories

IEEE Electron Device Letters

Volumn 30, Issue 12, 2009, Pages 1368-1370

  Park, Jemin ^a   Hu, Chenming ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Air gap technology; Air spacer technology; High speed; Low k process; RC delay

Indexed keywords

AIR GAP TECHNOLOGY; HIGH SPEED; MIXED MODE SIMULATION; MOS-FET; NITRIDE SPACERS; RC DELAY; SELF-ALIGNED; SPACER TECHNOLOGY; SWITCHING ENERGY; TRANSISTOR STRUCTURE;

NITRIDES; TEMPERATURE CONTROL;

TECHNOLOGY;

EID: 70549103376     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2009.2034032     Document Type: Article

References (4)

1. J. Park and C. Hu, "Air spacer MOSFET technology for 20 nm node and beyond," in Proc. ICSICT, Beijing, China, Oct. 2008, pp. 53-56.
2. M. M. Togo, A. Tanabe, A. Furukawa, K. Tokunaga, and T. Hashimoto, "A gate-side air-gap structure (GAS) to reduce the parasitic capacitance in MOSFETs," in VLSI Symp. Tech. Dig., 1996, pp. 38-39.
3. TSUPREM-4 User Manual, Synopsys, Mountain View, CA, 2006.
4. SENTAURUS User Manual, Synopsys, Mountain View, CA, 2008.